From: "Randy Brukardt" <randy@rrsoftware.com>
Subject: Re: AI12-0218: What is the portable representation clause for processing IETF packets on little-endian machines?
Date: Fri, 11 May 2018 17:00:54 -0500
Date: 2018-05-11T17:00:54-05:00 [thread overview]
Message-ID: <pd53qn$s9f$2@franka.jacob-sparre.dk> (raw)
In-Reply-To: c3a4f872-7e24-4d66-a425-776a1aa063f5@googlegroups.com
"Dan'l Miller" <optikos@verizon.net> wrote in message
news:c3a4f872-7e24-4d66-a425-776a1aa063f5@googlegroups.com...
On Thursday, May 10, 2018 at 5:40:49 PM UTC-5, Randy Brukardt wrote:
>> . If you just implement it in the front-end using code
>> equivalent to unchecked_conversions, you're forcing all of the operations
>> into memory
>
>Wait, what is the actual extant-in-reality use-case for byte-swapping
>between
>registers (within the same processor!) of (supposedly-)heterogenous
>endianness?
>(Not even the PDP-11's mixed endianness did that!) Does any processor
>exhibit
>such odd endianness within its own processor('s registers)? Methinks this
>is pure
>bicycle-shedding without any basis in reality.
You'd need that to implement AI12-0218-1, or a complete replacement of the
existing code for handling representation clauses. For Janus/Ada, at least,
we read the memory into a register, then do various masking an shifting
operations. One would want to do byte-swapping the same way.
I don't know of any way on the x86 processor of reading a byte-swapped
32-bit integer into a register so it can be used. If you don't do the byte
swapping in a register after reading, you would have to do it by doing a-la
Unchecked_Conversion, copying each byte from one memory location to another
temporary location in the reverse order, *then* reading the now-swapped
value into a register. That would be extremely expensive in Janus/Ada, since
we don't have any way to allocate temporary memory in many places where such
reads would occur (the fall back would be heap allocation/deallocation!).
Besides, the x86 has instructions like Xchg AL, AH which do byte swapping in
registers. One would rather use those rather than do extra memory
operations.
Thus, I conclude that back-end changes would be needed.
I don't know the situation on other processors vis-a-vis byte swapping, but
one can always generate the best possible code if the back-end is aware of
the need. Emulating it in the front-end can often end up sub-optimal.
>> don't allow any hardware support to get used.
>
>Hmmm, that one is somewhat more compelling if the processor has
>byte-swapping instructions.
If such instructions aren't available, you have either the choice of
Unchecked_Conversion (memory to memory swapping, followed by usual reading)
or doing it in a pair of registers with shifting/masking. I'd rather do the
latter, since the easiest way to speed up a program is to reduce the amount
of memory use. (The correlary is the reverse is also true. :-)
Randy.
next prev parent reply other threads:[~2018-05-11 22:00 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-10 17:45 AI12-0218: What is the portable representation clause for processing IETF packets on little-endian machines? Dan'l Miller
2018-05-10 19:24 ` Dan'l Miller
2018-05-10 20:32 ` Paul Rubin
2018-05-10 22:24 ` Dan'l Miller
2018-05-10 22:44 ` Niklas Holsti
2018-05-10 23:14 ` Paul Rubin
2018-05-11 2:38 ` Dan'l Miller
2018-05-11 7:55 ` Simon Wright
2018-05-11 12:11 ` Lucretia
2018-05-11 13:49 ` Simon Wright
2018-05-11 16:11 ` Jeffrey R. Carter
2018-05-11 16:48 ` Simon Wright
2018-05-11 19:08 ` Jeffrey R. Carter
2018-05-11 21:39 ` Simon Wright
2018-05-11 21:56 ` Jeffrey R. Carter
2018-05-12 7:08 ` Simon Wright
2018-05-12 7:53 ` Jeffrey R. Carter
2018-05-14 22:43 ` Randy Brukardt
2018-05-11 13:46 ` Simon Wright
2018-05-11 22:12 ` Randy Brukardt
2018-05-12 10:33 ` Björn Lundin
2018-05-12 13:08 ` Simon Wright
2018-05-12 14:21 ` Björn Lundin
2018-05-10 23:07 ` Paul Rubin
2018-05-11 0:14 ` Dan'l Miller
2018-05-11 0:30 ` Paul Rubin
2018-05-11 0:50 ` Dan'l Miller
2018-05-11 1:34 ` Paul Rubin
2018-05-11 2:11 ` Dan'l Miller
2018-05-11 22:32 ` Randy Brukardt
2018-05-11 8:02 ` Simon Wright
2018-05-11 22:14 ` Randy Brukardt
2018-05-10 19:28 ` Simon Wright
2018-05-10 22:40 ` Randy Brukardt
2018-05-10 22:50 ` Dan'l Miller
2018-05-11 22:00 ` Randy Brukardt [this message]
2018-05-12 1:15 ` Paul Rubin
2018-05-14 22:54 ` Randy Brukardt
2018-05-15 0:43 ` Paul Rubin
2018-05-15 21:39 ` Randy Brukardt
2018-05-15 0:44 ` Dennis Lee Bieber
2018-05-11 8:09 ` Simon Wright
2018-05-10 19:34 ` Dmitry A. Kazakov
2018-05-10 20:06 ` Dan'l Miller
2018-05-10 22:44 ` Paul Rubin
2018-05-10 22:50 ` Randy Brukardt
2018-05-11 9:40 ` Niklas Holsti
2018-05-11 11:40 ` Dan'l Miller
2018-05-11 20:16 ` Niklas Holsti
2018-05-11 9:40 ` Dmitry A. Kazakov
2018-05-11 14:21 ` AdaMagica
2018-05-26 16:15 ` Dan'l Miller
2018-05-26 19:02 ` AdaMagica
2018-05-26 21:01 ` Dan'l Miller
2018-05-27 14:58 ` AdaMagica
2018-05-27 18:03 ` Simon Wright
2018-05-29 22:17 ` Randy Brukardt
2018-05-30 6:39 ` Simon Wright
2018-05-30 7:25 ` Dmitry A. Kazakov
2018-05-30 15:01 ` Simon Wright
2018-05-30 15:59 ` Dan'l Miller
2018-05-30 19:38 ` Randy Brukardt
2018-05-27 18:04 ` Dan'l Miller
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