Re: Representation clauses and side-efects on STM32F411 ravenscar runtime

[Simon Clubley <clubley@remove_me.eisner.decus.org-Earth.UFP>]

On 2015-08-02, Frédéric Praca <frederic.praca@free.fr> wrote:
> For example, with the following declaration:
>
>    type Mantissa is range 0 .. 2**12 - 1 with Size => 12;
>    type Fraction is range 0 .. 2**4 - 1 with Size => 4;
>
>    type Baud_Rate_Register is
>       record
>          DIV_Fraction : Fraction;
>          DIV_Mantissa : Mantissa;
>       end record with Size => 32;
>    for Baud_Rate_Register use
>       record
>          DIV_Fraction at 0 range 0 .. 3;
>          DIV_Mantissa at 0 range 4 .. 15;
>       end record;
>
> If I write 
> 	USART2.BRR.DIV_Mantissa := 16#445#;
> 	USART2.BRR.DIV_Fraction := 16#c#;
> A memory dump shows the final content to be 0x00005c5c whereas 
> intermediary result was 0x00004450 as expected.
> n the other hand, if I write
> 	USART2.BRR := Baud_Rate_Register'(DIV_Mantissa => 16#445#,
>                                           DIV_Fraction => 16#c#);
>
> There is no problem, the final content is 0x0000445c as expected.
>
> Did someone experience such kind of behaviour with STM32 class micro-
> controllers ?

Look at the generated assembly code for the first example with objdump;
I suspect you will find there are load and/or store by byte references
in there.

Given the hardware restrictions on the size of accesses to the registers
that will cause Bad Things (TM) to happen.

Simon.

-- 
Simon Clubley, clubley@remove_me.eisner.decus.org-Earth.UFP
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