Re: Understanding GNAT Bare Board Run-time for Cortex-M

[Simon Wright <simon@pushface.org>]

Daniel Way <p.waydan@gmail.com> writes:

> I'm trying to port the bare-board GNAT run-time to a Coretex-M0+ (NXP
> KV11Z7) processor. I'm new to concurrency and have been reading
> through the run-times for the STM32 targets to understand how the
> tasks and protected objects are implemented, however, there seems to
> be a web of dependencies between the different packages and wrappers
> of wrappers of wrappers for types and subprograms.

Yes.

> * Is there any tool available to scan through the source code and
> generate a graphical call graph to help visualize the different
> dependencies?

Pass.

> * Has anyone on the forum successfully ported a bare-board run-time?
> What was your experience and do you have any tips?

AdaCore have published a guide for porting their runtime[0].

GNAT CE 2018 includes a ravenscar-sfp-microbit runtime.

My Cortex GNAT RTS[1] is based on FreeRTOS[2] and includes an RTS for
the nRF51 as found in the BBC micro:bit. That's a cortex-m0, but as far
as I can see[3] the differences from the m0+ are minimal.

The main issue I had was with the clock; the nRF51 doesn't have a system
tick, instead I had to use RTC1 (I think AdaCore used RTC0).

> * Is porting the run-time just a matter of updating the linker, a few
> packages, and a GPR script, or is there some fundamental
> implementation changes to consider?

That would be it (also the runtime.xml file) but the problem is
identifying _which_ packages to change! I wouldn't expect many from the
microbit RTS, it's likely to be clock setup and interrupt naming. It
would help if you had an SVD to generate the board peripheral
dependencies.

[0] https://github.com/AdaCore/bb-runtimes/tree/community-2018/doc/porting_runtime_for_cortex_m
[1] https://github.com/simonjwright/cortex-gnat-rts
[2] https://www.freertos.org
[3] https://community.cypress.com/docs/DOC-10652