Re: Two-stage suspend operations

[Simon Wright <simon@pushface.org>]

rieachus@comcast.net writes:

> On Monday, May 9, 2016 at 4:56:15 AM UTC-4, Simon Wright wrote:
>> I see what you mean. It's just that the wording in the ARM made it sound
>> as though "two-stage suspend operations" was a phrase widely known in
>> the community, which clearly isn't the case.
>
> If you look at this article from Wikipedia:
> https://en.wikipedia.org/wiki/Two-phase_locking and go down to "strong
> strict two-phase locking" you will see that it is not you, me or the
> Ada Rationale.  There are a lot of inconsistent names floating around
> in this area, and the Rationale apparently chose one that lost
> out. (Strong strict two-phase locking may not interest you, I just
> picked the article as one showing considerable name confusion in
> 2011.)

Yes. I think part of my confusion is that the example in the Rationale
doesn't actually involve locking at all.

> I'm curious as to why you are interested in this area.  Ada is a great
> language for implementing in memory databases.  At MITRE I worked on
> both ground based and in-flight radar systems.  The emphasis was on
> consistency and non-blocking.

I'm looking at a system[1] where I'm assured that we need to run a
drone's motor controller at 20 kHz, and SOs seemed a possibility. Of
course, if you need to avoid concurrency problems between a timer-driven
ISR and tasking code, using SOs isn't going to work! so we are looking
at swing-buffering or possibly GNAT's Lock_Free pragma/aspect[2].

[1] http://adapilot.likeabird.eu/index.html
[2] https://gcc.gnu.org/onlinedocs/gnat_rm/Pragma-Lock_005fFree.html