From: tmoran@acm.org
Subject: Re: Loops and parallel execution
Date: Thu, 27 Jan 2011 23:01:54 +0000 (UTC)
Date: 2011-01-27T23:01:54+00:00 [thread overview]
Message-ID: <ihsth1$igr$1@speranza.aioe.org> (raw)
In-Reply-To: ihq5br$ir9$1@munin.nbi.dk
> Finally, like Dmitry, I'm skeptical about fine-grained parallelism buying
> much. Unless there is specific architectural support (something that doesn't
> exist in commonly used processors -- and especially in commonly used target
> OSes/RTOSes), the management overhead will kill any savings on "small"
What about the SIMD (vector) instructions in Intel CPUs? Or is that
better done by simply calling their optimized, CPU capability detecting,
libraries?
next prev parent reply other threads:[~2011-01-27 23:01 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-01-25 15:40 Loops and parallel execution Georg Bauhaus
2011-01-25 16:37 ` Dmitry A. Kazakov
2011-01-25 17:36 ` Georg Bauhaus
2011-01-25 17:38 ` Georg Bauhaus
2011-01-25 21:32 ` Dmitry A. Kazakov
2011-01-25 22:07 ` Georg Bauhaus
2011-01-26 1:31 ` Yannick Duchêne (Hibou57)
2011-01-26 9:04 ` Dmitry A. Kazakov
2011-01-26 1:06 ` Yannick Duchêne (Hibou57)
2011-01-26 10:08 ` Dmitry A. Kazakov
2011-01-31 13:01 ` Paul Colin Gloster
2011-02-06 20:06 ` Yannick Duchêne (Hibou57)
2011-02-07 11:43 ` Nicholas Paul Collin Gloster
2011-01-26 8:46 ` Egil Høvik
2011-01-26 10:47 ` Georg Bauhaus
2011-02-14 23:27 ` Tuck
2011-02-15 21:10 ` Georg Bauhaus
2011-01-26 11:29 ` Peter C. Chapin
2011-01-26 21:57 ` Randy Brukardt
2011-01-27 23:01 ` tmoran [this message]
2011-01-29 0:23 ` Randy Brukardt
2011-02-06 20:10 ` Yannick Duchêne (Hibou57)
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