Re: Portable memory barrier?

[Robert Eachus <rieachus@comcast.net>]

On Wednesday, May 10, 2017 at 9:02:22 PM UTC-4, Randy Brukardt wrote:

> Write_Index needs to be atomic in order for the OP's algorithm to work. 
> Atomic objects fall under C.6(20/5) -- all reads and updates are included in 
> the external effect of the program. Optimizing them out (in any way) is 
> wrong (excepting of course a true as-if optimization, but that doesn't make 
> any sense in this case). In particular, saving the value in a register is 
> useless, because you still have to read the object again at the next 
> reference.

Even if there is no intervening read or write of anything?  It seems to me that must be an "as if," since there is no way to prove otherwise.  You may be thinking of reads of memory external to the CPU, part of some other hardware, where the other hardware can intervene.

Ah, the missing attribute:  Uncacheable.  Once upon a time, volatile implied that, but not for many years.  I guess there are still (embedded) processors out there where reading from a (memory mapped I/O) location changes its value, so I guess that is an issue for Ada, but only when running on bare metal.

What about spin-locks?  They have to have another action between reads to work.  Well you could pack all of a read, a test and say a jump non-zero all in one clock cycle.  But then there would be an extra read since the test would be on the prior version of the flags.  Put it into two clocks and the CPU can't be sure that the next read will occur.  In other words, it has to do the right number of reads which can affect flags, and no more.

Hmm. You need to read the (x86 and most other) rules for prefetching memory locations.  As I stated earlier in this thread, any CPU core is allowed to do a prefetch of any location, as long as it does not cause an action like an interrupt.  This is necessary, or you wouldn't be able to have any Atomic accesses. The CPU reads an entire cache line, usually 64, 128, or 256 bytes into the cache, but even the widest of CPU writes are only 64 bytes wide, and those are multiple floating-point values.