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From: Patrick Noffke <patrick.noffke@gmail.com>
Subject: Re: Ravenscar-sfp and interrupt priorities on Cortex-M4
Date: Fri, 13 Feb 2015 07:10:40 -0800 (PST)
Date: 2015-02-13T07:10:40-08:00	[thread overview]
Message-ID: <f500a3f0-5cb4-4890-ae7b-bd16222e2b26@googlegroups.com> (raw)
In-Reply-To: <lyd25ektvi.fsf@pushface.org>

On Friday, February 13, 2015 at 4:06:59 AM UTC-6, Simon Wright wrote:
> Patrick Noffke writes:
> 
> > I am porting the GNAT Ravenscar-sfp runtime to work with the TI TM4C
> > MCU, using the STM32F4 implementation as a starting point.
> 
> Good stuff!
> 
> > The file system-xi-cortexm4-sfp.ads defines Interrupt_Priority range
> > from 241 to 255, and this should be 249 to 255 for the TM4C MCU.
> > Because the available range is processor-dependent, this file should
> > probably be renamed to something like system-xi-stm32f4.ads and
> > system-xi-tm4c.ads, etc., and the appropriate file selected in
> > build-rts.sh.
> 
> I'm working with FreeRTOS (for STM32F4), which supports priorities from
> 0 to 7 out of the box.

I only just learned about the FreeRTOS-based runtime yesterday.  I will look into that.  I might need to repeat my porting efforts in the future for an Atmel SAM4S (or similar) MCU, and I think they offer a FreeRTOS port.

I am using the TM4C123 MCU which only has 32 KB of SRAM.  As it is, I had to reduce the interrupt handler stack size (from 1024 to either 256 or 512 -- TBD) in order to fit in the BSS section, and I'm still approaching the limit with the rest of the stuff in my application (1 KB just for the UDMA control table, 512-1024 bytes for the tasks, application data, etc.).  I'm not sure if FreeRTOS would add much overhead.  Do you have any input on that?

> STM's Hardware Abstraction Layer disapproves of
> applications using hardware interrupt priorities 4 .. 1 (4 for
> SysTick_Handler), so I've mapped hardware interrupt priorities 15 .. 5
> to Ada interrupt priorities 8 .. 18. I'm working on support for
> different boards!
> 
>    Max_Priority           : constant Positive := 7;
>    Max_Interrupt_Priority : constant Positive := 8 + (15 - 5);
> 
>    subtype Any_Priority       is Integer range 0 .. Max_Interrupt_Priority;
>    subtype Priority           is Any_Priority
>      range Any_Priority'First .. Max_Priority;
>    subtype Interrupt_Priority is Any_Priority
>      range Priority'Last + 1 .. Any_Priority'Last;
> 
>    Default_Priority : constant Priority :=
>      (Priority'First + Priority'Last) / 2;
> 
> (Note, this is adapted from ARM 2012, rather than AdaCore's)
> 
> > I copied file s-bbbosu-stm32f4.adb to s-bbbosu-tm4c.adb and had to
> > then change the To_PRI and To_Priority functions to multiply and
> > divide by 32, respectively.
> 
> Which base distribution are you working with? Doesn't look like the GPL
> one, which doesn't have any of the files you mention.

I am working with the "bare metal" Linux-hosted ARM32-elf distribution from libre.adacore.com.  I grabbed the binary toolchain and runtime (gnat-gpl-2014-arm-elf-linux-bin.tar.gz) and zfp-support-gpl-2014-src.tar.gz, and I extended the code in the zfp tarball to add support for the TM4C(123) MCU.  Is development of this implementation going to continue in the future, or do you think Free-RTOS-based runtimes will be the norm for Cortex-M4?

Best regards,
Patrick


  reply	other threads:[~2015-02-13 15:10 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-02-12 20:38 Ravenscar-sfp and interrupt priorities on Cortex-M4 Patrick Noffke
2015-02-13 10:06 ` Simon Wright
2015-02-13 15:10   ` Patrick Noffke [this message]
2015-02-13 18:40     ` Simon Wright
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