new DARPA initiative: optimizing compiler to logic-gates+PCB target

["Dan'l Miller" <optikos@verizon.net>]

https://www.eetimes.com/document.asp?doc_id=1333422#msgs

What the Electronics Resurgence Initiative (ERI) describes seems to be somewhere in the vicinity of Ada*+VHDL**+SPICE***+ATP****.

* e.g., for at least algorithmic description and data-structure/record-layout description, and perhaps general front-end/optimizing-backend architecture of bringing the concepts of a software compiler to ASIC/FPGA+PCB hardware

** e.g., for digital-logic description

*** e.g., for analog-electronics modeling, especially on the PCB

**** e.g., automated theorem prover, for automated transformation in lifter, lateral, and lowering directions

$100 million bet is on the table at the DARPA casino.

(Around AD2000 or so give or take a few years, Shlaer-Mellor world thought this was going to be their space to dominate.  Their vacuum/void is someone else's to fill nowadays.)