Re: For the AdaOS folks

[Ad Buijsen <albuijsen@home.invalid>]

Warren W. Gay VE3WWG wrote:
> Luke A. Guest wrote:

>> I certainly wouldn't do it like that. On hardware that has an MMU (most
>> these days), that would result in a very slow system due to the amount of
>> context switches, this is why the libraries need to be mapped into the
>> address space of the running app, i.e. shared between applications.
> 
> 
> There is no argument about the overhead in this case. However, I
> maintain that if enough people start using operating systems
> that are implemented this way, they'll finally enhance the
> hardware to correct this problem. Until then, people may as well
> continue to say "we can't do it that way". I believe the problem
> is fixable in hardware.
> 

It is, by tagging the TLB lines with an address space identifier. This 
is supported by MIPS CPUs with a R4000-style MMU (ASId), Alpha 21164 and 
21264 (ASN; the 21264 also has a tagged instruction cache), 
PowerPC-BookE (TID) and probably some mainframe CPUs.
Tagged TLBs can be simulated on IA32 and 'classic' PPC by segmentation 
tricks; this was done for L4.  I suspect that the Athlon64 has hidden 
tags to implement the flush filters.

The next problem would be the cost (in cycles) of kernel entry...

Ad Buijsen