Re: Ravenscar and context switching for Cortex-M4

[Niklas Holsti <niklas.holsti@tidorum.invalid>]

On 15-02-12 22:25 , Patrick Noffke wrote:
> I am porting the GNAT Ravenscar-sfp runtime to work with the TI TM4C
> MCU, using the STM32F4 implementation as a starting point.  I am
> having a problem where one of two tasks blocked on entries (each in
> separate protected objects) is not getting activated.

Can't help you with that, sorry... but hurrah! for working on Ada 
run-times for microcontrollers.

> According to
> http://docs.adacore.com/gnathie_ug-docs/html/gnathie_ug/gnathie_ug/the_predefined_profiles.html#ada-restrictions-in-the-ravenscar-profiles,
> at most one task may be queued on an entry.  I take this to mean *on
> a single entry* and that two tasks may be simultaneously queued on
> separate entries.  Is that correct?

Definitely correct. In typical Ravenscar applications, at any one time 
there are many tasks queued on entries, but at most one task is queued 
on each entry at the same time.

In some Ravenscar design guidelines, it is suggested that there should 
be a static association between task and entry, so that for each entry 
there is exactly one task that ever queues on this entry. This guideline 
ensures that there is no risk of two or more tasks ever queuing on the 
same entry at the same time, but I believe that the profile does not 
require this design rule -- it is allowed for more than one task to 
queue on the same entry, as long as they do not do it at the same time. 
In other words, the entry-queue length should never be more than one in 
a Ravenscar system (which means that it is not necessary to implement 
actual entry queues in the run-time).

-- 
Niklas Holsti
Tidorum Ltd
niklas holsti tidorum fi
       .      @       .