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* CPU resources for embedded Ada programs
@ 1993-01-04 17:27 agate!spool.mu.edu!uwm.edu!ux1.cso.uiuc.edu!news.cs.indiana.edu!nstn.ns.c
  0 siblings, 0 replies; 4+ messages in thread
From: agate!spool.mu.edu!uwm.edu!ux1.cso.uiuc.edu!news.cs.indiana.edu!nstn.ns.c @ 1993-01-04 17:27 UTC (permalink / raw)


  I recently recieved a copy of lessons learned report that covered two Ada 
development projects.  The projects were 50 and 80 KLOC, were real-time, 
embedded military applications that ran 68K series processors.  Based upon 
the experience of these two projects, the authors suggested that embedded, 
real-time Ada projects will require about 1 MB of RAM and 3 MIPS of CPU 
power for every 20 KLOC.

  Are these numbers valid?  Does anyone have any experience with similar 
rules of thumb?  Is it even possible to come up with rules of thumb such 
as this, given the diverse nature of many Ada applications.  Thanks.

Doug Brown
cffs@fox.nstn.ns.ca

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: CPU resources for embedded Ada programs
@ 1993-01-04 18:58 Stephe Leake
  0 siblings, 0 replies; 4+ messages in thread
From: Stephe Leake @ 1993-01-04 18:58 UTC (permalink / raw)


In article <cffs.14@fox.nstn.ns.ca>, cffs@fox.nstn.ns.ca (Doug Brown) writes...
>  I recently recieved a copy of lessons learned report that covered two Ada 
>development projects.  The projects were 50 and 80 KLOC, were real-time, 
>embedded military applications that ran 68K series processors.  Based upon 
>the experience of these two projects, the authors suggested that embedded, 
>real-time Ada projects will require about 1 MB of RAM and 3 MIPS of CPU 
>power for every 20 KLOC.
> 
>  Are these numbers valid?  Does anyone have any experience with similar 
>rules of thumb?  Is it even possible to come up with rules of thumb such 
>as this, given the diverse nature of many Ada applications.  Thanks.
> 
>Doug Brown
>cffs@fox.nstn.ns.ca

I'm using Alsys Ada on 3 bare 16 Mhz 386/387 Multibus I boards, running a
real-time robot control system with a basic servo cycle time of 20
milliseconds. There are 24K source lines of code, occupying about 500 kbytes of
RAM. I don't know the MIPS rating, but only half the code is on the servo
board, which has a 50% utilization. So my application and/or Alsys yeilds lower
requirements than the above.

Stephen Leake	NASA Goddard Robotics Lab
internet : nbssal@robots.gsfc.nasa.gov

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: CPU resources for embedded Ada programs
@ 1993-01-04 20:20 Mike Ryer
  0 siblings, 0 replies; 4+ messages in thread
From: Mike Ryer @ 1993-01-04 20:20 UTC (permalink / raw)


Regarding the statistic of 1MB RAM per 20k SLOC
   
   If you are counting full Ada Statements+Declarations, then 50 bytes
   each seems high.  This could be due to very intricate Ada statements,
   a lot of big buffers, tables, and other data areas, or a lousy compiler.

   If you are counting just plain lines, then 50 bytes per line indicates
   either pathological coding practices, gargantuan buffers, or a truly
   pathetic compiler.

   Most applications I've seen result in 3 to 6 machine instructions per
   executable statement, and 2 to 3 words per declaration.  I'd expect
   20k statements+declarations to yield about 500k.  20k lines should yield
   about 200k.

Regarding the statistic of 3 MIPS per 20k SLOC

   I'd expect anything between .00000001 and 1,000,000.  It depends on what
   you're doing.


Mike Ryer

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: CPU resources for embedded Ada programs
@ 1993-01-04 21:33 saimiri.primate.wisc.edu!zaphod.mps.ohio-state.edu!sol.ctr.columbia.edu!s
  0 siblings, 0 replies; 4+ messages in thread
From: saimiri.primate.wisc.edu!zaphod.mps.ohio-state.edu!sol.ctr.columbia.edu!s @ 1993-01-04 21:33 UTC (permalink / raw)


In article <cffs.14@fox.nstn.ns.ca>, cffs@fox.nstn.ns.ca (Doug Brown) writes:
> real-time Ada projects will require about 1 MB of RAM and 3 MIPS of CPU 
> power for every 20 KLOC.
> 

Our experience with 80960mc's and the Tartan compiler is about 10 to 11 bytes o
f
code and data per source line of code.  So for a 20 Ksloc program we need about
256K bytes of RAM and 256K bytes of ROM.  Horsepower needs are usually dependen
t
on the rates that the system requires and the processor loading that each of
those processes puts on the system. For example -- we have an older system that
has 200k + lines of Pascal but runs fine on a 800KIP machine.  All because we
allocated the processes and their priorities correctly.   A 3 MIP processor
would run the same system at the same rates, but it would be idle more, so we
could  bump up the rates at which the processes run to get better system
response.
-- 
-------------------------------------------------------------------------------
Todd A Sorensen               Honeywell Defense Avionics Systems Division
(505) 828-5611                internet: tas@dasd.honeywell.com
                              fax: (505) 828-5500
-------------------------------------------------------------------------------
 

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1993-01-04 17:27 CPU resources for embedded Ada programs agate!spool.mu.edu!uwm.edu!ux1.cso.uiuc.edu!news.cs.indiana.edu!nstn.ns.c
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1993-01-04 18:58 Stephe Leake
1993-01-04 20:20 Mike Ryer
1993-01-04 21:33 saimiri.primate.wisc.edu!zaphod.mps.ohio-state.edu!sol.ctr.columbia.edu!s

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