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From: "Dan'l Miller" <optikos@verizon.net>
Subject: Re: AI12-0218: What is the portable representation clause for processing IETF packets on little-endian machines?
Date: Fri, 11 May 2018 04:40:17 -0700 (PDT)
Date: 2018-05-11T04:40:17-07:00	[thread overview]
Message-ID: <a35dac4f-c515-49c7-b4e2-c5aba424fc82@googlegroups.com> (raw)
In-Reply-To: <fll6o1F39tuU1@mid.individual.net>

On Friday, May 11, 2018 at 4:40:19 AM UTC-5, Niklas Holsti wrote:
> On 18-05-11 01:50 , Randy Brukardt wrote:
> 
> > Portable representation clauses are a waste of time, especially as machines
> > are inconsistent in the ways that they number bits. Just don't go there.
> > (218 solves one such problem, but there are many others.)
> 
> The ability to specify Bit_Order for record representations is very 
> useful to me, as it allows my programs to be executed both on the target 
> HW (big-endian SPARC) and on the development workstations (little-endian 
> x86) with exactly the same HW-level input and output.
> 
> So thank you, ARG, for this!
> 
> There are some gotchas and limitations (most severe is the inability to 
> specify the ordering of the components of packed arrays within records) 
> but on the whole it works.
> 
> My current project has 115 cases of "for ...'Bit_Order use ...".
> 
> (And about three cases of having to manually expand packed arrays into 
> individual record components because of the inability mentioned above.)
> 
> -- 
> Niklas Holsti
> Tidorum Ltd
> niklas holsti tidorum fi
>        .      @       .

Please provide an example of a Bit_Order-based-representation-clause record that is portable between SPARC and IA-32/AMD64 (that is not utilizing the GNAT feature in A12-0218, and completely ignoring the packed-array troublesome case).  There is a perennial debate whether the •proper• usage of Bit_Order on •bug-free• representation clauses in an Ada compiler already solves the entire topic of A12-0218, making moot A12-0218 and GNAT's already-extant feature therein.  Your long 115-cases track-record of success with Bit_Order representation for endianness portability between SPARC and IA-32/AMD64 seems to not only concur, but strongly contains the wisdom necessary to decisively blow A12-0218 out of the water.  Please clearly lead us; please clearly teach us how to utilize Bit_Order properly.

  reply	other threads:[~2018-05-11 11:40 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-10 17:45 AI12-0218: What is the portable representation clause for processing IETF packets on little-endian machines? Dan'l Miller
2018-05-10 19:24 ` Dan'l Miller
2018-05-10 20:32   ` Paul Rubin
2018-05-10 22:24     ` Dan'l Miller
2018-05-10 22:44       ` Niklas Holsti
2018-05-10 23:14         ` Paul Rubin
2018-05-11  2:38         ` Dan'l Miller
2018-05-11  7:55           ` Simon Wright
2018-05-11 12:11             ` Lucretia
2018-05-11 13:49               ` Simon Wright
2018-05-11 16:11                 ` Jeffrey R. Carter
2018-05-11 16:48                   ` Simon Wright
2018-05-11 19:08                     ` Jeffrey R. Carter
2018-05-11 21:39                       ` Simon Wright
2018-05-11 21:56                         ` Jeffrey R. Carter
2018-05-12  7:08                           ` Simon Wright
2018-05-12  7:53                             ` Jeffrey R. Carter
2018-05-14 22:43                             ` Randy Brukardt
2018-05-11 13:46             ` Simon Wright
2018-05-11 22:12           ` Randy Brukardt
2018-05-12 10:33             ` Björn Lundin
2018-05-12 13:08               ` Simon Wright
2018-05-12 14:21                 ` Björn Lundin
2018-05-10 23:07       ` Paul Rubin
2018-05-11  0:14         ` Dan'l Miller
2018-05-11  0:30           ` Paul Rubin
2018-05-11  0:50             ` Dan'l Miller
2018-05-11  1:34               ` Paul Rubin
2018-05-11  2:11                 ` Dan'l Miller
2018-05-11 22:32                   ` Randy Brukardt
2018-05-11  8:02         ` Simon Wright
2018-05-11 22:14         ` Randy Brukardt
2018-05-10 19:28 ` Simon Wright
2018-05-10 22:40   ` Randy Brukardt
2018-05-10 22:50     ` Dan'l Miller
2018-05-11 22:00       ` Randy Brukardt
2018-05-12  1:15         ` Paul Rubin
2018-05-14 22:54           ` Randy Brukardt
2018-05-15  0:43             ` Paul Rubin
2018-05-15 21:39               ` Randy Brukardt
2018-05-15  0:44             ` Dennis Lee Bieber
2018-05-11  8:09     ` Simon Wright
2018-05-10 19:34 ` Dmitry A. Kazakov
2018-05-10 20:06   ` Dan'l Miller
2018-05-10 22:44     ` Paul Rubin
2018-05-10 22:50     ` Randy Brukardt
2018-05-11  9:40       ` Niklas Holsti
2018-05-11 11:40         ` Dan'l Miller [this message]
2018-05-11 20:16           ` Niklas Holsti
2018-05-11  9:40     ` Dmitry A. Kazakov
2018-05-11 14:21 ` AdaMagica
2018-05-26 16:15 ` Dan'l Miller
2018-05-26 19:02   ` AdaMagica
2018-05-26 21:01     ` Dan'l Miller
2018-05-27 14:58       ` AdaMagica
2018-05-27 18:03         ` Simon Wright
2018-05-29 22:17           ` Randy Brukardt
2018-05-30  6:39             ` Simon Wright
2018-05-30  7:25               ` Dmitry A. Kazakov
2018-05-30 15:01                 ` Simon Wright
2018-05-30 15:59                   ` Dan'l Miller
2018-05-30 19:38               ` Randy Brukardt
2018-05-27 18:04         ` Dan'l Miller
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