Support of Task Interrupt Entries

Support of Task Interrupt Entries

[Charles H. Sampson]

     According to LRM 1.1.2(6), Annex J is part of the core language 
and must therefore be supported by any standard-conforming compiler.  
However, in J.7.1(1) we have, "Implementations are _permitted_ to allow 
the attachment of task entries to interrupts via the address clause."  
Does this mean that they are also permitted to disallow this?

     This is an important point to my current project, a real time sys-
tem with a very large number of interrupt handlers that is porting from 
Ada 83 to Ada 95.  The validated Ada compiler that we have selected does 
not support J.7.1.

				Charlie
--
******

     For an email response, my user name is "sampson" and my host
is "spawar.nosc.mil".

Re: Support of Task Interrupt Entries

[Robert I. Eachus]

In article <1998Oct7.183511.17020@nosc.mil> csampson@inetworld.net (Charles H. Sampson) writes:

 >     According to LRM 1.1.2(6), Annex J is part of the core language 
 >  and must therefore be supported by any standard-conforming compiler.  
 > However, in J.7.1(1) we have, "Implementations are _permitted_ to allow 
 > the attachment of task entries to interrupts via the address clause."  
 > Does this mean that they are also permitted to disallow this?

   The next paragraph should make it clear:

   "The address of the task entry corresponds to a hardware interrupt
in an implementation-defined manner."

   The standard can't reasonably define a set of addresses and
interrupts to support, so that is left to the implementors, who can
choose none.  Of course, the rules of J.7.1 do apply to any interrupt
entries that are supported.

 >     This is an important point to my current project, a real time sys-
 > tem with a very large number of interrupt handlers that is porting from 
 > Ada 83 to Ada 95.  The validated Ada compiler that we have selected does 
 > not support J.7.1.

   Do they support the SP Annex? If they don't support the Systems
Programming annex, it seems to me you need to choose another compiler.
If they do claim to support the SP annex then you can use
Ada.Interrupts.Reference to bind interrupts to task entries.  (See C.3.2(22))
--

					Robert I. Eachus

with Standard_Disclaimer;
use  Standard_Disclaimer;
function Message (Text: in Clever_Ideas) return Better_Ideas is...

Re: Support of Task Interrupt Entries

[Charles H. Sampson]

In article <EACHUS.98Oct8150309@spectre.mitre.org>,
Robert I. Eachus <eachus@spectre.mitre.org> wrote:
>In article <1998Oct7.183511.17020@nosc.mil> csampson@inetworld.net (me) writes:
>
> >     According to LRM 1.1.2(6), Annex J is part of the core language 
> >  and must therefore be supported by any standard-conforming compiler.  
> > However, in J.7.1(1) we have, "Implementations are _permitted_ to allow 
> > the attachment of task entries to interrupts via the address clause."  
> > Does this mean that they are also permitted to disallow this?
>
>   The next paragraph should make it clear:
>
>   "The address of the task entry corresponds to a hardware interrupt
>in an implementation-defined manner."
>
>   The standard can't reasonably define a set of addresses and
>interrupts to support, so that is left to the implementors, who can
>choose none.  Of course, the rules of J.7.1 do apply to any interrupt
>entries that are supported.
>
> >     This is an important point to my current project, a real time sys-
> > tem with a very large number of interrupt handlers that is porting from 
> > Ada 83 to Ada 95.  The validated Ada compiler that we have selected does 
> > not support J.7.1.
>
>   Do they support the SP Annex? If they don't support the Systems
>Programming annex, it seems to me you need to choose another compiler.
>If they do claim to support the SP annex then you can use
>Ada.Interrupts.Reference to bind interrupts to task entries.  (See C.3.2(22))

     Actually, it looks to me like the second sentence of C.3.2(22) 
blesses this compiler's implementation.  It says, "This function 
[Ada.Interrupts.Reference] raises Program_Error if attaching task 
entries to interrupts ... is not supported."

     I thought I had read the pertinent sections of the LRM quite 
closely.  I even searched around a bit to see if "permitted" had been 
given a specialized, non-standard, meaning.  Now, on rereading those 
sections, I see that I missed a crucial point.  1.1.3(16) says that a 
standard-conforming implementation must support each capability 
_required_ by the core language.  Since J.7.1(1) says, "Implementations 
_are permitted_ ...," this is obviously not a requirement.  All very 
clear, once you see it.  Duh!

				Charlie
--
******

     For an email response, my user name is "sampson" and my host
is "spawar.navy.mil".

Re: Support of Task Interrupt Entries

[Robert I. Eachus]

   >   The standard can't reasonably define a set of addresses and
   >interrupts to support, so that is left to the implementors, who can
   >choose none.  Of course, the rules of J.7.1 do apply to any interrupt
   >entries that are supported.

In article <1998Oct13.183104.3784@nosc.mil> claveman@inetworld.net (Charles H. Sampson) writes:

  >    Actually, it looks to me like the second sentence of C.3.2(22) 
  > blesses this compiler's implementation.  It says, "This function 
  > [Ada.Interrupts.Reference] raises Program_Error if attaching task 
  > entries to interrupts ... is not supported."

  >     I thought I had read the pertinent sections of the LRM quite 
  > closely.  I even searched around a bit to see if "permitted" had been 
  > given a specialized, non-standard, meaning.  Now, on rereading those 
  > sections, I see that I missed a crucial point.  1.1.3(16) says that a 
  > standard-conforming implementation must support each capability 
  > _required_ by the core language.  Since J.7.1(1) says, "Implementations 
  > _are permitted_ ...," this is obviously not a requirement.  All very 
  > clear, once you see it.  Duh!

   This is one of those cases where the RM goes as far as it can, and
the marketplace has to take it the rest of the way.  The RM can't
require that the hardware has any particular set of interrupts, but it
does require for the SP and RT annexes that the package Ada.Interrupts
be present.  Annex J is always required, but since support for
interrupt entries was not required in Ada 83, they are permitted, not
required by the various annexes.
--

					Robert I. Eachus

with Standard_Disclaimer;
use  Standard_Disclaimer;
function Message (Text: in Clever_Ideas) return Better_Ideas is...