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From: "Mark Lundquist" <mark@rational.com>
Subject: Re: Help with Atomic_Components and whole array assignment
Date: Mon, 22 Jan 2001 11:52:49 -0800
Date: 2001-01-22T11:52:49-08:00	[thread overview]
Message-ID: <94i3qq$qr5$1@usenet.rational.com> (raw)
In-Reply-To: 94hn5p$on4$1@nnrp1.deja.com


Robert Dewar <robert_dewar@my-deja.com> wrote in message
news:94hn5p$on4$1@nnrp1.deja.com...
> In article <94hfaq$h3n$1@nnrp1.deja.com>,
>   mark_lundquist@my-deja.com wrote:
> >    for I in A'range loop
> >       A (I) := 0;
> >    end loop;
> >
> > you'll get 1-byte writes, guaranteed.
>
> That is not correct.
>
> > It's hard to imagine a compiler wanting to generate anything
> > but simply a 1-byte write for each element
>
> It's not hard at all. Converting this loop to a more efficient
> form is a quite reasonable optimization (the Microsoft C
> compiler does this for example, since it is a big win on
> earlier implementations of the ia32 architecture.

Ah, I didn't mean for the loop... but unfortunately, it's the loop that's
relevant :-(.  What I just meant for the assignment statement itself.  That
is, you'd expect a byte-addressable machine to generate a byte-wide access
for an assignment of a byte-wide type, not, for instance, a 32-bit read,
mask, logical or, then 32-bit write -- and I was saying that although you
can't otherwise assume that behavior, the atomicity rules would enforce it
(which you shot down in flames below :-).  But anyway, I missed the forest
for the trees at that point -- of course the compiler *can* say, "oh, he's
initializing this array... I know a better way".

Now then... if you pull out the byte write into its own procedure, then as
long as you know the compiler doesn't do any automatic inlining before it
tries to optimize the loop(and it doesn't do global optimization)...

Hah!  I just said that to get to you... and it worked, didn't it?  Eh?...
:-) :-)

Yeah, I know, if I have to say "as long as you know the compiler X" then
it's wrong.

Reminds me of the old Benny Hill episode... "Never ASSUME!  It makes an ASS
out of U and ME!"

>
> > but if it did want to, RM C.6(20) would not allow it
> > (violation of sharing properties of the other components).
>
> No, it is a perfectly legitimate optimization, and does not
> violate the quoted section, which talks about generating extra
> stores, not about combining store operations.

Phooey... you're right.

>
> > > Personally; this seems to be a recurrent embedded systems
> > > proble (that
> > > is either agonized over or [in]conveniently swept under the
> > > carpet).
>

[note,  someone else said this -- it was just part of the post I was
replying to...]

> No, it is not swept under the carpet, it is clear from the
> RM (as has been explained in many threads on the subject), that
> if your application requires specific sequences of instructions
> to be generated, then the ONLY legitimate way of doing this is
> with machine language insertions. To think otherwise is a
> recipe for mysterious and ill-documented implementation
> dependencies (the GNU/Linux kernel suffered from these problems
> early on).
>
> > > It would be nice if it were addressed at the next language
> > > revision.
>
> [...]
> I suppose we could add
>
>    pragma Full_Memory_Access (type);
>
> but at most we could only have implementation advice that this
> meant that every read or write must be done with a single
> instruction that affects those bits and nothing else (this
> basically would be a stronger and weaker condition than atomic,
> stronger, because it forbids, e.g., combing writes, or reading
> more than is needed, weaker, because at the bus level, there is
> no requirement for invidisibility.

Well, yeah, I think that is the idea! :-)

>
> But we could only make this implementation advice, since there
> is really no clear way at the semantic level to talk about
> generated instructions

Don't volatility/atomicity kind of suffer from this in general?  And why
couldn't you go stronger than implementation advice, and say the
implementation is required to do X on platforms where X is meaningful?

>  (consider for example that such a rule
> is completely meaningless when you are running in a JVM
> environment).

Sorry, I don't really know anything about the JVM so this example doesn't
mean anything to me...  So if you feel like elaborating, I'm interested,
otherwise no need...

Best,
-- mark







  reply	other threads:[~2001-01-22 19:52 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2001-01-22 11:22 Help with Atomic_Components and whole array assignment r_c_chapman
2001-01-22 12:51 ` Stuart Palin
2001-01-22 14:16   ` mark_lundquist
2001-01-22 16:09     ` Pat Rogers
2001-01-22 16:29     ` Robert Dewar
2001-01-22 19:52       ` Mark Lundquist [this message]
2001-01-30 15:54       ` Tucker Taft
2001-01-30 18:20         ` Robert Dewar
2001-01-31  5:08           ` DuckE
2001-01-31  5:57             ` Robert Dewar
2001-02-01  3:31               ` DuckE
2001-02-02 21:38               ` Mark Lundquist
2001-02-02 23:08                 ` Robert Dewar
2001-02-03  1:39                 ` tmoran
2001-01-22 16:21 ` Robert Dewar
2001-01-22 16:39   ` r_c_chapman
2001-01-30 15:57     ` Tucker Taft
2001-01-30 18:26       ` Robert Dewar
2001-01-30 21:30         ` Simon Wright
2001-02-01  6:11           ` Robert Dewar
2001-02-06  0:32         ` Richard Kenner
2001-02-06  3:15           ` Robert Dewar
2001-01-31 10:09       ` Rod Chapman
2001-01-31 21:41         ` Tucker Taft
2001-02-01  5:33           ` Robert Dewar
2001-02-01  9:42           ` Rod Chapman
2001-02-01 18:10             ` Robert Dewar
2001-02-01 13:14           ` SPARK flow analysis (was Help with Atomic_Components and whole array assignment) Stuart Palin
2001-02-01 23:38           ` Help with Atomic_Components and whole array assignment Nick Roberts
2001-02-02  3:45             ` Robert Dewar
2001-02-07 21:40           ` Nick Williams
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