Mealy machines, temporal logic, and Moore

[Emanuel Berg <embe8573@student.uu.se>]

There has been some discussion in comp.realtime, as well as in
comp.lang.ada, on this, and in the answers I got were
encouragement to read up on Mealy machines, Moore machines, and
Temporal logic, on Wikipedia. I did that, so I thought I'd write
what I learned.

It seems the machine in the exam question is a combination of a
Mealy and a Moore machine (but not quite).

In a Moore machine, input and state make for a transition to
another state. And the visited state makes for output.

In the exam question, there are information associated with the
states (e.g., x <= 10) - this could be considered output, to be
studied after the machine has been executed. "Aha, that's what
happened."

In a Mealy machine, input and state make for a transition to
another state (as in a Moore machine), but, unlike in a Moore
machine, that *transition* is associated with output, which is
outputted when the transition is made.

In the exam question, there is not really such "output", but
rather assignment - e.g., "x := 0". Now, this is troublesome (?)
because to synch the exam question with the Mealy/Moore machines I
have considered the clock x as *input*. When there is a "x < 5"
transition, I have considered that as a shorthand of parallel
transitions for x = 0, x = 1, ..., x = 5 (assuming x cannot be
negative). This seems sound, only now, with the "x := 0", it seems
the machine, as output, *changes* its input!

As for temporal logic, I'm struggling to understand the notation,
and how it should be applied to the FSA. I'm unsure if you should
introduce a new variable for the current state, or perhaps a list
variable p = [A, B, ...] for an execution trace.

-- 
Emanuel Berg - programmer (hire me! CV below)
computer projects: http://user.it.uu.se/~embe8573
internet activity: http://home.student.uu.se/embe8573