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From: dennison@telepath.com
Subject: Re: Context Switching
Date: 1999/05/12
Date: 1999-05-12T00:00:00+00:00	[thread overview]
Message-ID: <7hc2lh$513$1@nnrp1.deja.com> (raw)
In-Reply-To: 3738A31D.1013C463@mitre.org

In article <3738A31D.1013C463@mitre.org>,
  "Robert I. Eachus" <eachus@mitre.org> wrote:
>
>
>      Actually we have been finding on some modern microprocessors that
> the (distributed) overhead of cache misses can dominate other costs.
On
> others, where the cache is a "physical" cache that does not have to be
> invalidated,
> this overhead is very small.  I don't remember which chips are which
> here, but there were some cases where the cache miss overhead tripled
> the cost of a thread switch.

The "patch" I was talking about in another posting for vxWorks on a PII
was basicly the removal of a "write back invalidate cache" instruction
(WBINVD). According to Intel, it took about 5 cycles or so on a Pentium
and 486, but takes over 2000 on a PII. Yikes!

We knew there was a problem when the same code ran *slower* on a PII-400
than on a Pentium 166...

--
T.E.D.


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      reply	other threads:[~1999-05-12  0:00 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
1999-05-05  0:00 delay until and GNAT isaac buchwald
1999-05-05  0:00 ` David C. Hoos, Sr.
1999-05-05  0:00 ` dennison
1999-05-06  0:00   ` Buz Cory
1999-05-06  0:00     ` Robert Dewar
1999-05-06  0:00       ` delay until and GNAT - expand isaac buchwald
1999-05-07  0:00         ` Roger Racine
1999-05-08  0:00           ` dewar
1999-05-10  0:00             ` Roger Racine
1999-05-11  0:00               ` Robert Dewar
1999-05-11  0:00                 ` dennison
1999-05-11  0:00                   ` Robert Dewar
1999-05-12  0:00                 ` delay until and GNAT - where to get the info isaac buchwald
1999-05-12  0:00                   ` Robert Dewar
1999-05-10  0:00             ` delay until and GNAT - expand Roger Racine
1999-05-10  0:00               ` Joel Sherrill
1999-05-11  0:00               ` isaac buchwald
1999-05-11  0:00                 ` dennison
1999-05-12  0:00                 ` Robert Dewar
1999-05-11  0:00               ` Robert Dewar
1999-05-11  0:00                 ` dennison
1999-05-10  0:00             ` Context switching (was: delay until and GNAT) Nick Roberts
1999-05-11  0:00               ` Robert Dewar
1999-05-11  0:00               ` Robert Dewar
1999-05-11  0:00                 ` Tarjei Tj�stheim Jensen
1999-05-11  0:00                   ` David Brown
1999-05-11  0:00                   ` Robert Dewar
1999-05-11  0:00             ` delay until and GNAT - expand Roger Racine
     [not found]             ` <rracine.14.00 <rracine.15.000968A0@draper.com>
1999-05-11  0:00               ` Robert Dewar
     [not found]             ` <rracine.14.00 <rracine.17.0007DA28@draper.com>
1999-05-12  0:00               ` dennison
1999-05-12  0:00             ` Roger Racine
1999-05-06  0:00 ` delay until and GNAT Roger Racine
1999-05-10  0:00   ` Nick Roberts
1999-05-11  0:00     ` Context Switching Nick Roberts
1999-05-11  0:00       ` Robert Dewar
1999-05-11  0:00         ` Robert I. Eachus
1999-05-12  0:00           ` dennison [this message]
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