Re: Context switching (was: delay until and GNAT)

["Tarjei Tj�stheim Jensen" <tarjei.jensen@kvaerner.no>]

Robert Dewar wrote :
>  "Nick Roberts" wrote:
>> [:2:]  Many processor architectures today provide built-in
>> support for (normal) context switching, so that the operating
>> system will usually have very little to do with the speed of
>> these context switches.  Switches can generally be achieved
>> within a few dozen memory clock cycles (typically
>> out-of-cache), which will be, for most modern microcomputers,
>> in the ballpark of 1 microsecond (+/-1oom).
>
>Can you say what processor architectures you have in mind here?
>Certainly none of the ones that GNAT is commonly used on ...
>The context switch on the x86 in particular is horribly slow,
>and one would like to avoid it in a high efficiency x86 exec

This is from memory, so it might not be accurate:

The transputer and the ARM.

The ARM has a complete register set available for interrupt handling so you
don't have to save and restore the user mode register.

I believe the transputer had special hardware support for context switching.
What it exactly did is something which I don't remember.


Greetings,