From: nospam@somewhere.ia.us (Robert S. White)
Subject: Re: comp.arch.embedded
Date: 1997/12/19
Date: 1997-12-19T00:00:00+00:00 [thread overview]
Message-ID: <67ch20$dd2$2@flood.weeg.uiowa.edu> (raw)
In-Reply-To: 34991C2D.127F@sh.bel.alcatel.be
In article <34991C2D.127F@sh.bel.alcatel.be>, jdla@sh.bel.alcatel.be says...
>How does one debug code which is running on a target board processor
>using a debugger running on a PC or workstation (so running on
>a different processor).
>How is synchronized on breakpoints, how is single stepped ...
>Does the debugger have knowledge about the target processor
>instructions ?
Simple, one installs a "microprocessor emulator" in a PC or a Unix
workstation. Then you run a debugger (hexidecimal, symbolic, or even
source level) that works with the emulator (which is plugged into the
target hardware, in place of the normal target processor, or it disables
the target processor and runs the rest of the hardware instead). Often
this requires a "bond-out" chip from the microprocessor vendor.
>Are there standardizations needed and/or common ? Can each debugger
>be used for each processor ? If not, by what it is determined ?
A lot of variables here. In general not much is standardized now.
You have to buy unique hardware for each type of target processor.
_____________________________________________________________________
Robert S. White -- An embedded systems software engineer
e-mail reply to reverse of: ia us lib cedar-rapids crpl shift2 whiter
prev parent reply other threads:[~1997-12-19 0:00 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
1997-12-18 0:00 comp.arch.embedded Jos De Laender
1997-12-18 0:00 ` comp.arch.embedded Jos De Laender
1997-12-18 0:00 ` comp.arch.embedded John M. Mills
1997-12-19 0:00 ` Robert S. White [this message]
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