Is there any info about optimizing Ada via hardware ??

[rab@sun4.fit.edu]

Hi there,

I am looking for ANYTHING related to research that has been done on the
optimization of the Ada language via hardware... i.e. similar to the concept
of a LisP machine, FORTH machine, etc.  I haven't heard of any such machine
for Ada but have heard of some specific hardware components that attempt
optimization, especially in real-time environments.  Anything about this
topic would be appreciated.

For instance, are there chips which optimize any portion of the language?
Has anyone investigated or benchmarked the same compiler on different archi-
tectures?  Can Ada be used on any RISC machines?  What about performance on
multiprocessor machines?  Ada on PC's?

Please respond to:
Rhoda Baggs (Instructor and Ph.D. student at Florida Institute of Technology) 
rab@tuck.fit.edu

Thanks for any help in acquiring this information.