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From: "Frédéric Praca" <frederic.praca@free.fr>
Subject: Re: Representation clauses and side-efects on STM32F411 ravenscar runtime
Date: 15 Aug 2015 17:17:08 GMT
Date: 2015-08-15T19:17:08+02:00	[thread overview]
Message-ID: <55cf7414$0$3344$426a74cc@news.free.fr> (raw)
In-Reply-To: mqnm3g$8t0$1@dont-email.me

Le Sat, 15 Aug 2015 15:33:04 +0000, Simon Clubley a écrit :

> On 2015-08-15, Frédéric Praca <frederic.praca@free.fr> wrote:
>>
>> Hello Simon,
>> assembly has never been my favourite language and I only studied 68000
>> assembly a long time ago :)
>> I don't know what you really mean by "load and/or store by byte
>> references".
>> So, here's what I get by using objdump
> 
> [snip]
> 
>>    USART2.BRR.DIV_Fraction := 16#c#;
>>  8000418:	f44f 4388 	mov.w	r3, #17408	; 0x4400 
800041c:	f2c4 0300 	movt
>>  r3, #16384	; 0x4000 8000420:	7a1a      	ldrb	r2, [r3, 
#8]
>                                 ^^^^
>>  8000422:	f04f 010c 	mov.w	r1, #12 8000426:	f361 0203 
	bfi	r2, r1, #0,
>>  #4 800042a:	721a      	strb	r2, [r3, #8]
>                                 ^^^^
> 
> This violates the hardware level restrictions and it's not the first
> time I've come across this.
> 
> The same thing can happen with C as well when you try to use bitfields
> instead of bitmasks; it's a general gcc code generation issue for ARM.

Yes, that's what I thought because I was expecting the compiler to handle 
all the bitwise operations for me :)

> There are a couple of AIs created as a result of submissions by myself
> which you might find interesting:
> 
> http://www.ada-auth.org/cgi-bin/cvsweb.cgi/ai12s/ai12-0127-1.txt?rev=1.1
> http://www.ada-auth.org/cgi-bin/cvsweb.cgi/ai12s/ai12-0128-1.txt?rev=1.1
> 
> They contain proposed ideas about how to tackle this problem in a future
> version of Ada.
As far as I understood by reading in diagonal, this is related to the use 
of the Volatile and Atomic aspects with a composite record.

> 
>> From what I read in the ARM assembly manual, this seems to be ok from
>> an assembly point of view so I think this can come from the hardware
>> restrictions. Am I right ?
>>
>>
> Yes you are.
Ok, reading your AIs, I think I better understand the whole picture.
Thanks Simon for answering so clearly.
 
> Simon.
Fred.


      reply	other threads:[~2015-08-15 17:17 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-02  8:59 Representation clauses and side-efects on STM32F411 ravenscar runtime Frédéric Praca
2015-08-02  9:40 ` Simon Wright
2015-08-02 10:22   ` Simon Wright
2015-08-02 14:53     ` Frédéric Praca
2015-08-02 14:52   ` Frédéric Praca
2015-08-02 15:19     ` Simon Wright
2015-08-02 19:23 ` Jeffrey R. Carter
2015-08-02 19:54   ` Bob Duff
2015-08-02 20:01     ` Frédéric Praca
2015-08-02 20:13       ` Bob Duff
2015-08-02 20:27         ` Frédéric Praca
2015-08-02 20:31     ` Jeffrey R. Carter
2015-08-03 11:08 ` Simon Clubley
2015-08-15 14:22   ` Frédéric Praca
2015-08-15 15:33     ` Simon Clubley
2015-08-15 17:17       ` Frédéric Praca [this message]
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