Re: Representation clauses and side-efects on STM32F411 ravenscar runtime

["Frédéric Praca" <frederic.praca@free.fr>]

Le Sun, 02 Aug 2015 10:40:33 +0100, Simon Wright a écrit :

> Frédéric Praca <frederic.praca@free.fr> writes:
> 
>> I was expecting the compiler (GNAT GPL 2014 (20140331) from Adacore
>> under Linux x64) to handle all and, or and xor operations by itself for
>> such kind of representation. Was I wrong ?
> 
> I think you should declare Baud_Rate_Register as Volatile in any case.

Yes, I've done this later in the code defining the whole register :
USART1 : USART_Registers with Volatile,
     Address => System'To_Address (USART1_Base);

see https://github.com/FredPraca/ravenscar-sfp-stm32f411-nucleo/blob/
master/ravenscar-sfp-stm32f411-nucleo/adainclude/s-stmusa.ads

> But there was a discussion here about this recently; Volatile doesn't
> guarantee any sort of full word access (or half word; how would the
> compiler know?).
I thought that Volatile was only about avoiding caching data and tell to 
the compiler that the variable would be modified externally.
 
> AdaCore recently included aspect Volatile_Full_Access[1] which is
> supposed to do what you want.
Ok, thanks for the pointer.
 
> GNAT GPL 2015 recognises this aspect; FSF GCC 5.1.0 doesn't (I haven't
> looked into 5.2.0 yet, but AdaCore typically only fix serious bugs in
> subreleases).
> 
> Failing that, the recommended technique to change one component is to
> use a temporary:
> 
> declare
>    BRR : Baud_Rate_Register := USART2.BRR;
> begin
>    BRR.DIV_Mantissa := 16#445#; USART2.BRR := BRR;
> end;

Great ! I'll try this.
  
> but of course if you're changing all the components your whole record
> assignment will do the trick.
> 
> In any case, a whole record assignment is better practice, because it
> means the compiler won't let you forget to assign a component.
Totally agree, I like this kind of help from the compiler.
 
> [1]
> http://www.adacore.com/developers/development-log/NF-74-M715-002-gnat/