From: "Frédéric Praca" <frederic.praca@free.fr>
Subject: Representation clauses and side-efects on STM32F411 ravenscar runtime
Date: 02 Aug 2015 08:59:15 GMT
Date: 2015-08-02T10:59:15+02:00 [thread overview]
Message-ID: <55bddbe2$0$3384$426a74cc@news.free.fr> (raw)
Hello guys,
I'm currently playing with the Ravenscar runtime for STM32.
More precisely, I have a Nucleo card which has a STM32F411 processor.
For this, I found this runtime (https://github.com/nickpascucci/ravenscar-
sfp-stm32f411-nucleo ) and decided to experiment few changes by using
representation clauses instead of playing with bits which I find to be
error prone.
My problem is that when using simple assignments on a record component, I
have other bits touched by this assignment.
For example, with the following declaration:
type Mantissa is range 0 .. 2**12 - 1 with Size => 12;
type Fraction is range 0 .. 2**4 - 1 with Size => 4;
type Baud_Rate_Register is
record
DIV_Fraction : Fraction;
DIV_Mantissa : Mantissa;
end record with Size => 32;
for Baud_Rate_Register use
record
DIV_Fraction at 0 range 0 .. 3;
DIV_Mantissa at 0 range 4 .. 15;
end record;
If I write
USART2.BRR.DIV_Mantissa := 16#445#;
USART2.BRR.DIV_Fraction := 16#c#;
A memory dump shows the final content to be 0x00005c5c whereas
intermediary result was 0x00004450 as expected.
n the other hand, if I write
USART2.BRR := Baud_Rate_Register'(DIV_Mantissa => 16#445#,
DIV_Fraction => 16#c#);
There is no problem, the final content is 0x0000445c as expected.
Did someone experience such kind of behaviour with STM32 class micro-
controllers ?
Could it be related to the fact that the datasheet specified that 16-bit
records should be written/accessed by 16-bit (Litteraly, "The peripheral
registers have to be accessed by half-words (16 bits) or words (32
bits)") ?
I was expecting the compiler (GNAT GPL 2014 (20140331) from Adacore under
Linux x64) to handle all and, or and xor operations by itself for such
kind of representation. Was I wrong ?
Thanks for the clarification.
Fred
next reply other threads:[~2015-08-02 8:59 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-02 8:59 Frédéric Praca [this message]
2015-08-02 9:40 ` Representation clauses and side-efects on STM32F411 ravenscar runtime Simon Wright
2015-08-02 10:22 ` Simon Wright
2015-08-02 14:53 ` Frédéric Praca
2015-08-02 14:52 ` Frédéric Praca
2015-08-02 15:19 ` Simon Wright
2015-08-02 19:23 ` Jeffrey R. Carter
2015-08-02 19:54 ` Bob Duff
2015-08-02 20:01 ` Frédéric Praca
2015-08-02 20:13 ` Bob Duff
2015-08-02 20:27 ` Frédéric Praca
2015-08-02 20:31 ` Jeffrey R. Carter
2015-08-03 11:08 ` Simon Clubley
2015-08-15 14:22 ` Frédéric Praca
2015-08-15 15:33 ` Simon Clubley
2015-08-15 17:17 ` Frédéric Praca
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