Re: Boeing 787 integer overflow

[robin.vowels@gmail.com]

On Monday, May 4, 2015 at 6:29:00 PM UTC+10, Georg Bauhaus wrote:
> On 04.05.15 01:54, r.nospam@gmail.com wrote:
> >> A software fix might be nice, such as increasing the counter to 64 bits to
> >> >push the overflow time out to something ridiculous,
> > That isn't the solution.
> > The solution is to have an appropriate error handler.
> 
> If the variable has system-wide effects, I think error
> handling would require a little more than a few lines of
> code for overflow. Also provided that detecting overflow can
> be made fast enough in the first place.

Apparently there is already an error handler.
Detecting overflow is typically very fast.
On some systems, detection is automatic by hardware
while on others, an instruction is executed following the
relevant arithmetic operation, to raise an interrupt should
overflow occur.

> So, if the bit size could be increased without affecting
> the system in other ways, this looks like a much cheaper
> solution to me.

Might not be possible.  Dedicated processors have limits on
the size of a word, or size of the arithmetic register(s).

Merely using more bits in a register [even if permitted
by hardware] is not the solution.  It merely defers it.

The solution is to fix the software, by handling the interrupt
with a different error handler from the general one.
An alternative might be to initialize the timer automatically
before every take-off.