PowerPC ISA

PowerPC ISA

[Charles H. Sampson]

     Has anyone developed an Ada type that describes the PowerPC
instruction set architecture?  Failing that, does anyone know of an
available description of how a PowerPC CPU might decode instructions?

     I'm fighting a horrendous bug in a high-rate real-time system; a
procedure's return address on the stack is being overwritten.  I'm going
to write another procedure that can look at the stack on each execution
of the crippled procedure.  Initially it will just look at stack sizes.
As I learn more, it will be modified.

     I've got the IBM book that describes the PowerPC but it's not laid
out to answer my questions.  If I get no joy here, I'll figure it out
myself but I have no interest at all in reinventing the wheel.  I need
to get this done as quickly and cheaply as possible.

                        Charlie
-- 
Nature and nature's laws lay hid in night.
God said "Let Newton be," and all was light. - Pope

Re: PowerPC ISA

[Brian Drummond]

On Fri, 13 Mar 2009 22:58:44 -0700, csampson@inetworld.net (Charles H. Sampson)
wrote:

>     Has anyone developed an Ada type that describes the PowerPC
>instruction set architecture?  Failing that, does anyone know of an
>available description of how a PowerPC CPU might decode instructions?
>
>     I'm fighting a horrendous bug in a high-rate real-time system; a
>procedure's return address on the stack is being overwritten.  I'm going
>to write another procedure that can look at the stack on each execution
>of the crippled procedure.  Initially it will just look at stack sizes.
>As I learn more, it will be modified.
>
>     I've got the IBM book that describes the PowerPC but it's not laid
>out to answer my questions.  If I get no joy here, I'll figure it out
>myself but I have no interest at all in reinventing the wheel.  I need
>to get this done as quickly and cheaply as possible.
>
>                        Charlie

Sometimes all you need is a different view to help the official book make sense.
It's not clear which PowerPC is under discussion but if it is any relation to
the PPC405 (as incorporated onto various Xilinx FPGAs) the following may be
useful. 
"PowerPC Processor Reference Guide"
http://www.xilinx.com/support/documentation/user_guides/ug011.pdf

Possibly also worth scanning XAPP1117 for (Xilinx-specific?) debugging
techniques, and associated source for a program _designed_ to crash! (to
exercise the debugging tools). Stack errors are mentioned on p.12.
http://www.xilinx.com/support/documentation/application_notes/xapp1117.pdf
It seems "the stack" is a much more flexible concept than I am used to: a mere
convention (hopefully) agreed to by all users of registers.

I tried searching support.xilinx.com for "PPC stack" and nothing more jumps out
except for
http://www.xilinx.com/support/answers/24291.htm which says
"The PowerPC stack and heap information is available on the IBM Web site at
http://www-3.ibm.com/chips/techlib/techlib.nsf/techdocs/852569B20050FF77852569970071B0D6/$file/eabi_app.pdf"

That link unfortunately doesn't seem to work any more. Perhaps it serves as a
proof-of-existence for a useful document; searching ibm.com for eabi_app.pdf
might be fruitful.

- Brian 

Re: PowerPC ISA

[Stuart]

"Charles H. Sampson" <csampson@inetworld.net> wrote in message 
news:1iwjgj2.1gcbtto1mbvuicN%csampson@inetworld.net...
>     Has anyone developed an Ada type that describes the PowerPC
> instruction set architecture?  Failing that, does anyone know of an
> available description of how a PowerPC CPU might decode instructions?
...
>     I've got the IBM book that describes the PowerPC but it's not laid
> out to answer my questions.  If I get no joy here, I'll figure it out
> myself but I have no interest at all in reinventing the wheel.  I need
> to get this done as quickly and cheaply as possible.

It's not entirely clear what you want to achieve with this Ada type, but if 
it is to create machine code inserts, then you might want to look at package 
Machine_Code for the compiler you are using.

It is also not clear what questions you are seeking answers for that are not 
adequately explained by the manual you have.  As you are describing some 
stack corruption then it may be that you are trying to understand how things 
are set up on the stack.  This is not necessarily best described by a 
PowerPC processor manual as the processor does not have a stack register; 
only by convention is r1 used as the stack pointer.  If this is what you are 
trying to deal with you will probably want to get hold of a copy of the 
PowerPC Embedded Application Binary Interface (EABI) which describes the 
conventions recommended (and widely observed) for the PowerPC.

Regards
-- 
   Stuart

Re: PowerPC ISA

[Brian Drummond]

On Sat, 14 Mar 2009 13:17:57 +0000, Brian Drummond
<brian_drummond@btconnect.com> wrote:

>On Fri, 13 Mar 2009 22:58:44 -0700, csampson@inetworld.net (Charles H. Sampson)
>wrote:
>
>>     Has anyone developed an Ada type that describes the PowerPC
>>instruction set architecture?  Failing that, does anyone know of an
>>available description of how a PowerPC CPU might decode instructions?


>"The PowerPC stack and heap information is available on the IBM Web site at
>http://www-3.ibm.com/chips/techlib/techlib.nsf/techdocs/852569B20050FF77852569970071B0D6/$file/eabi_app.pdf"
>
>That link unfortunately doesn't seem to work any more. Perhaps it serves as a
>proof-of-existence for a useful document; searching ibm.com for eabi_app.pdf
>might be fruitful.

Google "eabi_app.pdf" has
www.ibm.com/chips/techlib/techlib.nsf/techdocs/852569B20050FF77852569970071B0D6/$file/eabi_app.pdf
as the first hit; the link seems to work today.

- Brian