ADA - VHDL

["P. Cnudde VH14 (8218)" <cnuddep@sh.bel.alcatel.be>]

Hello,

As a "experienced" VHDL programmer and now looking for the
first time really into ADA I have some historical questions
and I hoped that somebody on those two newsgroups could help me
making some points more clear.

I agree there are a lot of similarities between the languages, but I do
not understand the reason for many differences. There are things which 
I can not do in VHDL which I can in ADA and for which I see no reason.
 some examples: 
	type new Integer;
	generics;
	variant records

on the other hand there are also points which are more flexible in VHDL
	
I also see no reason for some syntax differences ("to" in VHDL, ".." in ADA)

I agree the differences may be small but to my oppinion it will cause problems
in the future where hardware-software codesign will come a reallity and a single
language we be needed. I think that VHDL-ADA is a very powerfull combination but
would it not be possible to get the small differences between the languages out of 
way and grow to a single language capable of discribing both: VHDL-ADA-2000

What are the oppinions of the experts on this point?


Regards,


-- 


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