Just stumbled across the infamous "Operand Error"

Just stumbled across the infamous "Operand Error"

[Mike Silva]

In reading some Motorola FPU documentation I inadvertently found what
appears to be the infamous Operand Error that was involved in the
Ariane 5 disaster.  I've never seen a definitive explanation of the
Operand Error before (and according to the archives others on this
group have scratched their heads about it as well).  Well, here's the
short dope from the manual:

<<<
Operand Error (OPERR)
This non-maskable handler is entered via vector number 52 at location
$00D0. It provides compatibility of results with the MC68881/2 for B,
W, and L destination formats when the source operand is a NaN
(Not-a-Number), infinity, or value too large for the integer format.
>>>

So, assuming the Ariane SRI was built around Motorola CPU/FPU as has
been reported, the mysterious Operand Error reference now makes
perfect sense.  It was indeed a hardware exception, and not an
exception generated by the Ada runtime checking.  This makes it
completely clear that the same result would have happened regardless
of the programming language used, because whatever the language, it
seems clear that the the Operand Error exception handler would have
been specified and written to perform exactly as it did.

Not that I needed convincing, but it's nice to finally understand the
fault mechanism.

Mike