* Sanity breaks out at last
@ 1996-07-26 0:00 ntxbow
1996-07-29 0:00 ` whiting_ms@corning.com (Matt Whiting)
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: ntxbow @ 1996-07-26 0:00 UTC (permalink / raw)
we're finally thinking of giving Intel processors the heave ho.
Does anyone know of Ada compilers for non-intel embedded evironments, ie
motorola and ARM processors?
I've used the XD ada compiler on 68000s before now but it's very pricey.
--
ntxbow
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: Sanity breaks out at last 1996-07-26 0:00 Sanity breaks out at last ntxbow @ 1996-07-29 0:00 ` whiting_ms@corning.com (Matt Whiting) 1996-07-29 0:00 ` Larry Kilgallen 1996-08-05 0:00 ` ntxbow 2 siblings, 0 replies; 6+ messages in thread From: whiting_ms@corning.com (Matt Whiting) @ 1996-07-29 0:00 UTC (permalink / raw) In article <BdceaIANXM+xEwtR@ntxbow.demon.co.uk>, ntxbow <ntxbow@ntxbow.demon.co.uk> writes: > we're finally thinking of giving Intel processors the heave ho. > May I ask why? We're just beginning to think of using Intel processors given the wealth of s/w (OS and application) that runs on them. Matt ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: Sanity breaks out at last 1996-07-26 0:00 Sanity breaks out at last ntxbow 1996-07-29 0:00 ` whiting_ms@corning.com (Matt Whiting) @ 1996-07-29 0:00 ` Larry Kilgallen 1996-07-29 0:00 ` William W Pritchett 1996-08-05 0:00 ` ntxbow 2 siblings, 1 reply; 6+ messages in thread From: Larry Kilgallen @ 1996-07-29 0:00 UTC (permalink / raw) In article <BdceaIANXM+xEwtR@ntxbow.demon.co.uk>, ntxbow <ntxbow@ntxbow.demon.co.uk> writes: > we're finally thinking of giving Intel processors the heave ho. > > Does anyone know of Ada compilers for non-intel embedded evironments, ie > motorola and ARM processors? > > I've used the XD ada compiler on 68000s before now but it's very pricey. Does everybody need the XD Ada compiler ? I would think one of the benefits of Ada would be that coding could be done on any platform, along with a lot of the testing. Larry Kilgallen ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: Sanity breaks out at last 1996-07-29 0:00 ` Larry Kilgallen @ 1996-07-29 0:00 ` William W Pritchett 0 siblings, 0 replies; 6+ messages in thread From: William W Pritchett @ 1996-07-29 0:00 UTC (permalink / raw) Check out Green Hills, Tartan, Rational, Thomson and/or DDC-I. They all target the 68K family. Larry Kilgallen (kilgallen@eisner.decus.org) wrote: : In article <BdceaIANXM+xEwtR@ntxbow.demon.co.uk>, ntxbow <ntxbow@ntxbow.demon.co.uk> writes: : > we're finally thinking of giving Intel processors the heave ho. : > : > Does anyone know of Ada compilers for non-intel embedded evironments, ie : > motorola and ARM processors? : > : > I've used the XD ada compiler on 68000s before now but it's very pricey. : Does everybody need the XD Ada compiler ? : I would think one of the benefits of Ada would be that coding could : be done on any platform, along with a lot of the testing. : Larry Kilgallen ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: Sanity breaks out at last 1996-07-26 0:00 Sanity breaks out at last ntxbow 1996-07-29 0:00 ` whiting_ms@corning.com (Matt Whiting) 1996-07-29 0:00 ` Larry Kilgallen @ 1996-08-05 0:00 ` ntxbow 1996-08-07 0:00 ` whiting_ms@corning.com (Matt Whiting) 2 siblings, 1 reply; 6+ messages in thread From: ntxbow @ 1996-08-05 0:00 UTC (permalink / raw) In article <1996Jul29.132621.1@corning.com>, "whiting_ms@corning.com (Matt Whiting)" <whiting_ms@corning.com> writes >In article <BdceaIANXM+xEwtR@ntxbow.demon.co.uk>, ntxbow ><ntxbow@ntxbow.demon.co.uk> writes: >> we're finally thinking of giving Intel processors the heave ho. >> >May I ask why? We're just beginning to think of using Intel processors given >the wealth of s/w (OS and application) that runs on them. > >Matt because compared to the 68ks they're painful, hardware design is a pain in the neck, we have to frequently use assembler which in intel is just another pain non-orthogonal, too many leap-branch-if-you're-called-fred instructions that just don't need to be there, I know I dont have to use the CISC aspects but they bug me anyway, stupid segemented memory architecture, which no doubt people will say I don't have to use, but I've worked on various projects dating back 10+ years, I've had to believe me. I've yet to meet someone who's used the two families and prefers Intel. Quantity of tools for the Intel family also does not imply quality, there's a lot of dross out there. -- jeff farr ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: Sanity breaks out at last 1996-08-05 0:00 ` ntxbow @ 1996-08-07 0:00 ` whiting_ms@corning.com (Matt Whiting) 0 siblings, 0 replies; 6+ messages in thread From: whiting_ms@corning.com (Matt Whiting) @ 1996-08-07 0:00 UTC (permalink / raw) In article <iNh0PHAF$aByEw9b@ntxbow.demon.co.uk>, ntxbow <ntxbow@ntxbow.demon.co.uk> writes: > In article <1996Jul29.132621.1@corning.com>, "whiting_ms@corning.com > (Matt Whiting)" <whiting_ms@corning.com> writes >>In article <BdceaIANXM+xEwtR@ntxbow.demon.co.uk>, ntxbow >><ntxbow@ntxbow.demon.co.uk> writes: >>> we're finally thinking of giving Intel processors the heave ho. >>> >>May I ask why? We're just beginning to think of using Intel processors given >>the wealth of s/w (OS and application) that runs on them. >> >>Matt > > because compared to the 68ks they're painful, hardware design is a pain > in the neck, we have to frequently use assembler which in intel is just > another pain non-orthogonal, too many leap-branch-if-you're-called-fred > instructions that just don't need to be there, I know I dont have to use > the CISC aspects but they bug me anyway, stupid segemented memory > architecture, which no doubt people will say I don't have to use, but > I've worked on various projects dating back 10+ years, I've had to > believe me. I've yet to meet someone who's used the two families and > prefers Intel. Quantity of tools for the Intel family also does not > imply quality, there's a lot of dross out there. -- Fortunately, I don't need to design hardware around the CPU (just plug the BPU board into the VME backplane) and don't need to use ASM anymore either. When using an HLL the vagaries of the Intel architecture tend to be less trouble. Thanks for your explanation. --------------------------------------------------------------------------- Matthew S. Whiting, P.E. | PP-ASEL-IA | All opinions expressed herein are Corning Incorporated | C-182K/A | strictly personal. whiting_ms@corning.com | | ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~1996-08-07 0:00 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 1996-07-26 0:00 Sanity breaks out at last ntxbow 1996-07-29 0:00 ` whiting_ms@corning.com (Matt Whiting) 1996-07-29 0:00 ` Larry Kilgallen 1996-07-29 0:00 ` William W Pritchett 1996-08-05 0:00 ` ntxbow 1996-08-07 0:00 ` whiting_ms@corning.com (Matt Whiting)
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox