Using signal in Verdix Ada

Using signal in Verdix Ada

[agate!howland.reston.ans.net!usc!sol.ctr.columbia.edu!hamblin.math.byu.ed]

I am looking for an example of the signal routine as
implemented in Verdix Ada.

Thanks.

Bert Nelson
bnelson@csulx.weber.edu

Re: Using signal in Verdix Ada

[Esther Lumsdon]

bnelson@csulx.weber.edu (Bert Nelson) writes:
>I am looking for an example of the signal routine as
>implemented in Verdix Ada.

---------- example of masking signals in VADS --------------------
with v_interrupts;
procedure tick is

-- use v_interrupts.set_interrupt_status to disable sigusr, sigint,
--  sigchild signals
--- signal 14 interferes with time slicing and delay statements in runtime.
--- several other signals interfere with a.db operations; see debugger
---- reference "set" command for details

  SIGINT  : constant := 2;
  SIGCHLD : constant := 20;
  SIGUSR1 : constant := 30;
-- to block these 3 signals, set bits 1, 19, 29 in mask.

  orig_int_status : v_interrupts.interrupt_status_t;
  new_int_status : v_interrupts.interrupt_status_t
    := 16#20080002# ;

begin
-- look at v_i_types.intr_status_s
  orig_int_status := v_interrupts.set_interrupt_status( new_int_status );
  loop
----- loops forever; gives you time to send signals to the Ada process.
  end loop;

end;
-- 
-- Esther Lumsdon, not speaking for Verdix.   esther@verdix.com
"It's time to cut bait and talk turkey.  It takes 2 snakes to cross a
puddle. You have to bale hay while the tractor is warm."
  ---- either H. Ross Perot or Dave Barry