From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00 autolearn=ham autolearn_force=no version=3.4.4 X-Google-Thread: 103376,1a44c40a66c293f3 X-Google-Thread: 1089ad,7e78f469a06e6516 X-Google-Attributes: gid103376,gid1089ad,public X-Google-Language: ENGLISH,ASCII-7-bit Path: g2news2.google.com!news1.google.com!fu-berlin.de!uni-berlin.de!individual.net!not-for-mail From: Martin Thompson Newsgroups: comp.lang.ada,comp.lang.vhdl Subject: Re: Embedded languages based on early Ada (from "Re: Preferred OS, processor family for running embedded Ada?") Followup-To: comp.lang.vhdl Date: Thu, 01 Mar 2007 13:23:08 +0000 Organization: TRW Conekt Message-ID: References: <1172192349.419694.274670@k78g2000cwa.googlegroups.com> <1172239820.896603.222120@k78g2000cwa.googlegroups.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Trace: individual.net 66MdZOXD1j5GCowIsNSA8wqAfoZdWEJ3vTPq/cYpxl8qHd+8k= User-Agent: Gnus/5.11 (Gnus v5.11) Emacs/22.0.92 (windows-nt) Cancel-Lock: sha1:XFBPO5hrlS7ckA7iYsflPcWsGo4= Xref: g2news2.google.com comp.lang.ada:9620 comp.lang.vhdl:7581 Date: 2007-03-01T13:23:08+00:00 List-Id: Colin Paul Gloster writes: > I post from news:comp.lang.ada to news:comp.lang.vhdl . > I'll leap in then :-) > Stephen A. Leake wrote in news:news:u649rx29a.fsf@stephe-leake.org on > news:comp.lang.ada for the benefit of Mike Silva: > > "[..] > > [..] FPGA development relies heavily on simulation, > which does not require real hardware." > > > A warning to Mike Silva: supposed simulators for languages chiefly > used for FPGAs often behave differently to how source code will > actually behave when synthesized (implemented) on a field programmable > gate array. This is true of cheap and expensive tools promoted as > simulators. > What do you mean by this? The VHDL I simulate behaves the same as the FPGA, unless I do something bad like doing asynchronous design, or miss a timing constraint. These are both design problems, not simulation or language problems. > " multi-dimensional > arrays) gave a feeling of clarity and integrity absent from software > development languages." > > > Apparently for many years, VHDL subset tools (the only kind of VHDL > tools which exist, so even if the language was excellent one would > need to restrict one's code to what was supported) used to not support > multi-dimensional arrays. > What's this about "only VHDL subset" tools existing? Modelsim supports all of VHDL... It is true that synthesis tools only support a subset of VHDL, but a lot of that is down to the fact that turning (say) an access type into hardware is a bit tricky. Multi dimensional arrays have worked (even in synthesis) for years in my experience. (Followup-to trimmed to comp.ang.vhdl) Cheers, Martin -- martin.j.thompson@trw.com TRW Conekt - Consultancy in Engineering, Knowledge and Technology http://www.conekt.net/electronics.html