From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00 autolearn=ham autolearn_force=no version=3.4.4 X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 103376,5618e4c4489899ac X-Google-Attributes: gid103376,public X-Google-ArrivalTime: 2002-08-01 12:32:14 PST Path: archiver1.google.com!news1.google.com!newsfeed.stanford.edu!canoe.uoregon.edu!hammer.uoregon.edu!skates!not-for-mail From: Stephen Leake Newsgroups: comp.lang.ada Subject: Re: implementation approach Date: 01 Aug 2002 15:18:25 -0400 Organization: NASA Goddard Space Flight Center (skates.gsfc.nasa.gov) Message-ID: References: NNTP-Posting-Host: anarres.gsfc.nasa.gov Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Trace: skates.gsfc.nasa.gov 1028230019 14130 128.183.220.71 (1 Aug 2002 19:26:59 GMT) X-Complaints-To: usenet@news.gsfc.nasa.gov NNTP-Posting-Date: 1 Aug 2002 19:26:59 GMT User-Agent: Gnus/5.09 (Gnus v5.9.0) Emacs/21.2 Xref: archiver1.google.com comp.lang.ada:27584 Date: 2002-08-01T19:26:59+00:00 List-Id: ma740988@pegasus.cc.ucf.edu (Mark) writes: > I'm in a quandry here and could certainly use some help. That said, > some background information. > > I've got code spread across two processors. We'll call processors A > and B respectively. Of interest is a device I'm communicating with > (serial). The code for communicating with said device resides on > processor A. > While communicating with the device during a 'certain' mode, the > communication is as follows: > - I send a command. > - Device sends an interrupt > - I synchronize with interrupt and send said command again > -- and so on .. > > Trouble is. The interrupt gets routed through and FPGA and 'goes' > through processor B. Hmm. Have you tried saying "Either the serial port needs to be commanded from processor B, or the interrupt needs to be handled by processor A". Why can't processor B command the serial port? Why can't the hardware design be changed so processor A handles the interrupt? Always try to do it right, first! > On B i've got an interrupt handler .. "pragma Attach_Handler .." > that'll check if the interrupt happened. When it does I could > perhaps set a flag, then pass the message via a Send_Message routine > to processor A and the routine for commanding the device on A will > again command device. This makes sense. > After 8 months of ADA I'm startign to catch on, however, my ADA is > still 'limited'. In any event, I'm thinking a semaphore might might > be the most elegant approach or ... I'm open for ideas. If semaphore > could someone provide me with an example on how to do this? You'll have to look in your operating system manuals to see what is provided. (the "non-Ada", but probably simpler, way). Or, look in the Distributed Systems Annex to see what is available there. (the "Ada way"). -- -- Stephe