From mboxrd@z Thu Jan  1 00:00:00 1970
X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me
X-Spam-Level: 
X-Spam-Status: No, score=-0.8 required=5.0 tests=BAYES_00,INVALID_MSGID,
	SUBJ_ALL_CAPS autolearn=no autolearn_force=no version=3.4.4
X-Google-Language: ENGLISH,ASCII-7-bit
X-Google-Thread: 1089ad,2e03bc978c29ea47
X-Google-Attributes: gid1089ad,public
X-Google-Thread: 103376,2e03bc978c29ea47
X-Google-Attributes: gid103376,public
From: Jean-Marc Bourguet <bourguet@muelec.fpms.ac.be>
Subject: Re: ADA - VHDL
Date: 1996/07/11
Message-ID: <sgd923q6gp.fsf@su2>#1/1
X-Deja-AN: 167793347
sender: bourguet@su2
references: <31E2391F.A16BEBD@sh.bel.alcatel.be>
organization: Faculte Polytechnique de Mons, Service d'Electronique
x-access: 16 727
newsgroups: comp.lang.ada,comp.lang.vhdl
Date: 1996-07-11T00:00:00+00:00
List-Id: <comp.lang.ada>


dewar@cs.nyu.edu (Robert Dewar) writes
> 
> Paul says
> 
> "VHDL has ascending and descending ranges.  Ada has only ascending ranges.
> I find it more convenient and understandable to write, e.g.,
> 
>         for i in 10 downto 1 loop       -- VHDL
> 
> than
> 
>         for i in reverse 1 .. 10 loop   -- Ada
> 
> Paul
> "
> 
> Unconvincing -- sure you will always find someone who finds X more
> "convenient and understandable" than Y (and of course someone else
> who finds Y more "convenient and understandable" than X). I do not
> find this a good basis for a gratuitous change like the above (I
> would find a change in either direction gratuitious), and indeed
> it seems that some of the differences between VHDL and Ada are
> not justified, they seem to be cases where personal taste has
> intruded unnecessarily.
> 

I think this difference between VHDL and Ada is perhaps gratuitous,
but has the advantage to emphasize the difference between VHDL and
Ada range. VHDL range are characterized by
	- base type
	- bounds
	- direction
when Ada range are characterized by 
	- base type
	- bounds

So the downto in the VHDL instruction is part of the syntax of the
range, and may be used everywhere a range is needed (indexes of array
by example) when the reverse in the Ada equivalent is part of the
syntax of the loop.

As a consequence, VHDL has attribute Left, Right, Low, High to get the
bounds of the range, and Ascending to know its direction where Ada has
only (and need only) First and Last.

I wonder if descending range would be used so much if we had to write
	signal Data is std_logic_vector (reverse 0..7);
-- 
 Jean-Marc Bourguet                      Service d'Electronique
                                         Faculte polytechnique de Mons
 Email : bourguet@muelec.fpms.ac.be      Mons, Belgique