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From: rouillard@acm.org (Jacques Rouillard)
Subject: Re: ADA - VHDL
Date: 1996/07/09
Message-ID: <rouillard-0907962020220001@mac-rouillard.imt-mrs.fr>#1/1
X-Deja-AN: 167432604
references: <31E2391F.A16BEBD@sh.bel.alcatel.be>
organization: ESIM/EII-ISMEA
newsgroups: comp.lang.ada,comp.lang.vhdl
Date: 1996-07-09T00:00:00+00:00
List-Id: <comp.lang.ada>


In article <31E2391F.A16BEBD@sh.bel.alcatel.be>, "P. Cnudde VH14 (8218)"
<cnuddep@sh.bel.alcatel.be> wrote:

> Hello,
> 
> As a "experienced" VHDL programmer and now looking for the
> first time really into ADA I have some historical questions
> and I hoped that somebody on those two newsgroups could help me
> making some points more clear.
> 
> I agree there are a lot of similarities between the languages, but I do
> not understand the reason for many differences. There are things which 
> I can not do in VHDL which I can in ADA and for which I see no reason.
>  some examples: 
>         type new Integer;

You're right that you can have integer types in VHDL but you can't have a
new integer. I think the main reason is complexity.

>         generics;

Ibidem. Genericity in Ada is an order of magnitude more complex than in VHDL.

>         variant records

Here there is a fundamental reason: signals are defined based on
scalarity. The very notion of event is at risk if you have variant
records. This was examined in a special session of the ballot resolution
group, and the only workable solution led to a separation of the notion of
scalar type (which you can't cut into parts) from atomic type (of which
you can make a signal). Abandonned because of complexity.

> 
> on the other hand there are also points which are more flexible in VHDL
>         
> I also see no reason for some syntax differences ("to" in VHDL, ".." in ADA)
> 

In Ada you don't have downtos which were felt a must when you have to deal
with hardware busses.


> I agree the differences may be small but to my oppinion it will cause problems
> in the future where hardware-software codesign will come a reallity and
a single
> language we be needed. I think that VHDL-ADA is a very powerfull
combination but
> would it not be possible to get the small differences between the
languages out of 
> way and grow to a single language capable of discribing both: VHDL-ADA-2000
> 
> What are the oppinions of the experts on this point?

Unfortunatly IMHO the two languages have diverged to a point that a
VHDL-ADA is not realistic. The similarities between the two languages are
a danger more than a clue, most of the time.

-- Jacques Rouillard 
USA http://vhdl.org/~rouillard   EU http://ismea.imt-mrs.fr/~rouillar