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From: "Jeffrey R. Carter" <spam.jrcarter.not@spam.not.acm.org>
Newsgroups: comp.lang.ada
Subject: Re: Portable memory barrier?
Date: Sat, 6 May 2017 21:41:05 +0200
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Xref: news.eternal-september.org comp.lang.ada:46689
Date: 2017-05-06T21:41:05+02:00
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On 05/06/2017 04:17 PM, Jere wrote:
>
> Side note:  If I read it right, you seemed to indicate that volatile has nothing
> to do with sequence.  I'm no Ada expert, so I wanted to ask your interpretation
> of section 16/3 of C.6.  I'm used to C and C++ where if you have two volatile
> variables being updated like this:
>
> Vol_Var_1 = 0;
> Vol_Var_2 = 23;
>
> That the C and C++ standard guarantees the "compiler" will not reorder those two
> statements.  Note this says nothing about atomicness (which is only one reason
> among others why Volatile is not sufficient for threading).  It also doesn't
> prevent the processor from reordering them.  When I read that section in C.6 of
> the RM, the verbage made me think Ada also prevented the compiler from
> reordering the statements (again no relation to atomicness or CPU reordering).
>
> Is this not the case?

Volatile is intended to guarantee that all reads and writes deal with the memory 
location directly. The idea is for things like memory-mapped H/W registers, 
where the H/W might change the value of the register or writing to the register 
causes the H/W to do something. This prevents optimizations that keep the value 
in a register for a while before writing it back to memory, for example, but not 
reordering the accesses to different variables IIUC. However, this is getting 
into the area where language lawyers are needed.

-- 
Jeff Carter
"[M]any were collected near them, ... to
enjoy the sight of a dead young lady, nay,
two dead young ladies, for it proved twice
as fine as the first report."
Persuasion
155