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From: "Jeffrey R. Carter" <spam.jrcarter.not@spam.not.acm.org>
Newsgroups: comp.lang.ada
Subject: Re: Portable memory barrier?
Date: Sat, 6 May 2017 21:26:39 +0200
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Xref: news.eternal-september.org comp.lang.ada:46688
Date: 2017-05-06T21:26:39+02:00
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On 05/06/2017 04:17 PM, Jere wrote:
>
> Assuming the indexes are atomic and volatile, then I am not worried about
> partial writes to the indexes.  I"m more worried about some architectures that
> allow for instruction reordering.  What I don't want to happen is in Task A that
> the store to My_Array happens after the update to the Put_Index.  If that
> happens, then there are cases where Task B verifies the buffer isn't empty and
> tries to access the array but Task A hasn't gotten around to updating the array
> because the CPU decided to rearrange the stores.

Yes, Ada, having had tasking since the beginning, has ways to deal with this. 
They involve grouping the index increment and the array assignment together into 
a single thing that is atomic with respect to the index read. This is called a 
"critical region" in CS, and is usually a protected operation in Ada, although 
one could also use a suspension object or machine-code insertion.

-- 
Jeff Carter
"[M]any were collected near them, ... to
enjoy the sight of a dead young lady, nay,
two dead young ladies, for it proved twice
as fine as the first report."
Persuasion
155