From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-0.3 required=5.0 tests=BAYES_00, REPLYTO_WITHOUT_TO_CC autolearn=no autolearn_force=no version=3.4.4 Path: eternal-september.org!reader01.eternal-september.org!reader02.eternal-september.org!news.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: "G.B." Newsgroups: comp.lang.ada Subject: Re: Ada 2012 Constraints (WRT an Ada IR) Date: Wed, 7 Dec 2016 11:04:00 +0100 Organization: A noiseless patient Spider Message-ID: References: <47366b42-c0a3-41bf-a44a-5241c109d60f@googlegroups.com> <58f477d2-8b01-4001-bad8-47ea73424f4c@googlegroups.com> <6e206c3b-d4a8-44ab-9e0e-adb0924983ef@googlegroups.com> <10e8cb52-1cbd-40ed-ba11-f474c2263ced@googlegroups.com> <84oe4cdv010g9fba0jrjv2os7c0halucd0@4ax.com> Reply-To: nonlegitur@futureapps.de Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Injection-Date: Wed, 7 Dec 2016 10:02:39 -0000 (UTC) Injection-Info: mx02.eternal-september.org; posting-host="489451ed386a372a584fcd3a3e220792"; logging-data="13984"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX19a4EQr26I6K0nH0dJXwySDIE5ONu2jX0E=" User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.9; rv:45.0) Gecko/20100101 Thunderbird/45.5.1 In-Reply-To: <84oe4cdv010g9fba0jrjv2os7c0halucd0@4ax.com> Cancel-Lock: sha1:5cDJ0YqTwZO43Ycj9feZa+I88c0= Xref: news.eternal-september.org comp.lang.ada:32649 Date: 2016-12-07T11:04:00+01:00 List-Id: On 07.12.16 02:08, Dennis Lee Bieber wrote: > (Was a nice idea -- but the overhead of all the protection handling > bogged it down too much to get a foot-hold, or even a hand-hold ) The article https://en.wikipedia.org/wiki/Intel_iAPX_432 and its siblings mention a few specifics, hinting at how not the entire design might have failed. In no particular order: - bit-alignment, not word-alignment, - two-chip CGP speed limited by wiring on the board, - no (small?) caches, few registers - the compiler has routinely used slow general instructions, even when much faster alternatives would have worked (e.g., a call vs a jump, enter_environment for each use of a variable) - always call-by-value But given this kind of support in hardware, is it unthinkable to have special pieces of hardware that carry out assertion checking specially? I.e., have the compiler translate the check into some separate implementation running alongside the "real" program. One that only reads memory, and that either stops that program or, if so requested in the program using a dedicated exception handler, activates the handler in the real program. -- "HOTDOGS ARE NOT BOOKMARKS" Springfield Elementary teaching staff