From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00 autolearn=unavailable autolearn_force=no version=3.4.4 Path: eternal-september.org!reader01.eternal-september.org!reader02.eternal-september.org!news.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: Adam Jensen Newsgroups: comp.lang.ada Subject: Re: Getting started with bare-board development Date: Mon, 14 Nov 2016 23:20:45 -0500 Organization: A noiseless patient Spider Message-ID: References: Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Injection-Date: Tue, 15 Nov 2016 04:20:14 -0000 (UTC) Injection-Info: mx02.eternal-september.org; posting-host="9f32be05ceed8ab4eea6b0c0b258b397"; logging-data="28621"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX187FIdDWxDLRabVficyDLiW" User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 In-Reply-To: Cancel-Lock: sha1:bcyrPOiQ01p80Ojr240ewu/aVs8= Xref: news.eternal-september.org comp.lang.ada:32319 Date: 2016-11-14T23:20:45-05:00 List-Id: On 11/14/2016 08:14 PM, antispam@math.uni.wroc.pl wrote: > Just to address this point: real time embedded systems are frequently > done with single chip microcontrollers. Microcontroller contains > combinatorial logic (processor core, digital peripherials), https://en.wikipedia.org/wiki/Combinational_logic https://en.wikipedia.org/wiki/Combinatory_logic > SRAM, flash and analog parts. Having all this on single chip > brings substantial advantages. But the drawback is that > various parts have conflicting manufacturing requirements. > So no part is as good as "pure" chip could be. In particular, I'm inclined towards an approach that involves an FPGA such that signal and control processing could take place in custom logic. Given that, it might make sense [for me and my applications] to use a soft processor core like the LEON3. With this approach, the peripheral components, being implemented in the FPGA, could be selected and tuned specifically for the application. > microcontroller at lower end may have as little as 32 bytes > of RAM and at high end rarely go into megabyte range. > Basically, if you need more RAM you need to go into multi-chip > design with separate memory chip. Then you can easily get > say 256 MB, but latency of external memory is much larger > than internal SRAM. So while you may have plenty of > external memory program using it will run slower. Worse, > high latency means that it is hard to give assurance > of real time behaviour. Slow doesn't mean less deterministic, right? > STM32F4-Discovery contains relatively large microcontoller. > Nucleo boards have several versions containg both middle > sized and large microcontollers. > > Note that flash is typically much larger than RAM, so > in fact you can have quite a lot functionalty inside > a single chip microcontroller. When talking about > critical system I would say that modern microcontollers > give you quite a lot of space where bugs can hide. > In other words, to limit effort spent on validating > code you may wish to limit size of your system so > that in effect it fits in small device. Do you have any estimates and/or examples of how much flash and RAM are required/used for various run-time profiles and programs of varying complexity?