From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00 autolearn=unavailable autolearn_force=no version=3.4.4 Path: eternal-september.org!reader01.eternal-september.org!reader02.eternal-september.org!news.eternal-september.org!mx02.eternal-september.org!feeder.eternal-september.org!gandalf.srv.welterde.de!news.jacob-sparre.dk!loke.jacob-sparre.dk!pnx.dk!.POSTED!not-for-mail From: Tero Koskinen Newsgroups: comp.lang.ada Subject: Re: Protected Objects and Interrupt Handlers Date: Thu, 25 Feb 2016 19:40:54 +0200 Organization: JSA Research & Innovation Message-ID: References: <7663896a-a15e-47fd-8c7e-54a1c20d8d0f@googlegroups.com> <2922ffdd-9678-4502-9bcb-8b199af91543@googlegroups.com> NNTP-Posting-Host: 37-136-129-166.rev.dnainternet.fi Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit X-Trace: loke.gir.dk 1456422029 13384 37.136.129.166 (25 Feb 2016 17:40:29 GMT) X-Complaints-To: news@jacob-sparre.dk NNTP-Posting-Date: Thu, 25 Feb 2016 17:40:29 +0000 (UTC) User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 In-Reply-To: Xref: news.eternal-september.org comp.lang.ada:29608 Date: 2016-02-25T19:40:54+02:00 List-Id: Hi, 25.2.2016, 18.02, Simon Wright wrote: > Maciej Sobczak writes: > >> Last but no least - Simon has pointed you towards an article (a >> book chapter, in fact) where the interrupts are handled by regular >> procedures instead - as an author of that text I feel responsible >> for clarifying why - the reason is that the book consistently >> assumes a zero-runtime execution platform, where the necessary >> scaffolding for protected objects (namely: actual synchronization) >> simply does not exist. > > A minor point: a common cited advantage of the Cortex series is that > ISRs can be written in ordinary code, without compiler magic. This > seems to imply that other MCUs _do_ need compiler magic! Yes, ARM Cortex-Mx family processors can have normal C functions as interrupt handlers because when the interrupt occurs the hardware pushes a set of registers to stack automatically (and also restores the registers when returning from the interrupt). On the other hand, 8-bit AVRs do not have this feature, so for them you need to mark the interrupt handler somehow so that the compiler can generate different code for them. In general, ARM Cortex-Mx processors are "C-friendly". For example in the normal case, you can have all the startup code in C (or in Ada, which is then exported to C) and there is no need for assembler. Yours, Tero