From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00 autolearn=ham autolearn_force=no version=3.4.4 X-Google-Thread: a07f3367d7,c9d5fc258548b22a X-Google-Attributes: gida07f3367d7,public,usenet X-Google-NewGroupId: yes X-Google-Language: ENGLISH,UTF8 Path: g2news1.google.com!news3.google.com!feeder1.cambriumusenet.nl!feed.tweaknews.nl!194.109.133.84.MISMATCH!newsfeed.xs4all.nl!newsfeed5.news.xs4all.nl!xs4all!feeds.phibee-telecom.net!eternal-september.org!feeder.eternal-september.org!.POSTED!not-for-mail From: Simon Wright Newsgroups: comp.lang.ada Subject: Re: How do I write directly to a memory address? Date: Wed, 09 Feb 2011 21:30:01 +0000 Organization: A noiseless patient Spider Message-ID: References: <67063a5b-f588-45ea-bf22-ca4ba0196ee6@l11g2000yqb.googlegroups.com> <19fh1chm74f9.11cws0j5bckze.dlg@40tude.net> <4d4ff70e$0$6886$9b4e6d93@newsspool2.arcor-online.net> <737a6396-72bd-4a1e-8895-7d50f287960e@d28g2000yqc.googlegroups.com> <4d5008a5$0$6879$9b4e6d93@newsspool2.arcor-online.net> <4d5031fe$0$6765$9b4e6d93@newsspool3.arcor-online.net> <1f229967-d3cf-42b6-8087-c97ee08652f3@i40g2000yqh.googlegroups.com> <4d51169e$0$7657$9b4e6d93@newsspool1.arcor-online.net> <1bnp0pw1c8r5b$.guxc48qweiwe.dlg@40tude.net> <4d51a1c0$0$19486$882e7ee2@usenet-news.net> <87411ec5-c197-4143-8ef1-ab9ddb20bcc6@q40g2000prh.googlegroups.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Injection-Info: mx03.eternal-september.org; posting-host="dFCm8HWntFqmDIilBLqEJQ"; logging-data="18102"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1/dLA5PzYCQfO+ygAPjpU6XpHR/OK+bMCE=" User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.2 (darwin) Cancel-Lock: sha1:jE3WdZqDtVKpQD7Nws+gBIHiiWE= sha1:KXhqyJ3/jgrxvomA0D33e8m3H6c= Xref: g2news1.google.com comp.lang.ada:17164 Date: 2011-02-09T21:30:01+00:00 List-Id: "Vinzent Hoefler" <0439279208b62c95f1880bf0f8776eeb@t-domaingrabbing.de> writes: > Simon Wright wrote: > >> "Vinzent Hoefler" <0439279208b62c95f1880bf0f8776eeb@t-domaingrabbing.de> >> writes: >> >>> Adam Beneschan wrote: >>> >>>> That's not the correct answer. The correct answer is to ask, >>>> "Third bit from which end?" >>> >>> From the less significant end, unless you want the bit numbers to >>> change when assigned to different sized variables. >> >> Well, on big-endian hardware like standard PowerPC, they - in some >> sense - do. > > No. Even although Ada has the somewhat flawed concept of Bit_Order, > there isn't any sense on turning it around. Bit 0 is the bit with the > value 2**0, Bit 1 is 2**1, ... and that's true on _every_ hardware, no > matter on which side of the chip the flip-flop storing the bit is > located. ;) That is certainly the way my brain would like to work. However... I've always understood that the bit numbering in big-endian Ada compilers was chosen because that was the way bits were numbered in standard big-endian architectures (eg, MC68000 as used in SUN systems). On looking at the reference manual for the archetypal BE machine (the MC68000 series), at http://www.freescale.com/files/archives/doc/ref_manual/M68000PRM.pdf, it's clear that bits are numbered with LSB=0. The bit instructions (BSET, BTST) likewise. But, in a bizarre attempt by the hardware designers to confuse the rest of us, the bit *field* instructions are different: on Page 3-20, para 3.3.4, "One of the data types provided by the MC68030 is the bit field, consisting of as many as 32 consecutive bits. An offset from an effective address and a width value defines a bit field. The offset is a value in the range of – 231 through 231 – 1 from the most significant bit (bit 7) at the effective address. The width is a positive number, 1 through 32. The most significant bit of a bit field is bit 0. The bits number in a direction opposite to the bits of an integer." I guess the bit field instructions were more commonly used (for a start, BSET etc were limited to a byte when operating in store). Looking at the equivalent for the PowerPC - http://www.ibm.com/developerworks/systems/library/es-archguide-v2.html, Book I, we at least see consistency: "Bits in registers, instructions, and fields are specified as follows. - Bits are numbered left to right, starting with bit 0. - Ranges of bits are specified by two numbers separated by a colon (:). The range p:q consists of bits p through q." So, at a hardware level, like it or not, (some) big-endian processors Really Do Number The Bits From The MSB.