From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,FREEMAIL_FROM autolearn=unavailable autolearn_force=no version=3.4.4 X-Received: by 10.99.168.73 with SMTP id i9mr4077799pgp.27.1494467492128; Wed, 10 May 2017 18:51:32 -0700 (PDT) X-Received: by 10.157.14.91 with SMTP id n27mr197488otd.8.1494467492083; Wed, 10 May 2017 18:51:32 -0700 (PDT) Path: eternal-september.org!reader01.eternal-september.org!reader02.eternal-september.org!news.eternal-september.org!news.eternal-september.org!feeder.eternal-september.org!news.glorb.com!c26no556037itd.0!news-out.google.com!v18ni1312ita.0!nntp.google.com!c26no557099itd.0!postnews.google.com!glegroupsg2000goo.googlegroups.com!not-for-mail Newsgroups: comp.lang.ada Date: Wed, 10 May 2017 18:51:31 -0700 (PDT) In-Reply-To: Complaints-To: groups-abuse@google.com Injection-Info: glegroupsg2000goo.googlegroups.com; posting-host=2601:191:8303:2100:4c0f:e82:ed51:5ed8; posting-account=fdRd8woAAADTIlxCu9FgvDrUK4wPzvy3 NNTP-Posting-Host: 2601:191:8303:2100:4c0f:e82:ed51:5ed8 References: <0fc56bf7-1cfa-4776-9c47-a573db315c5f@googlegroups.com> <7b0c08eb-be62-4d14-ae99-cad038ad0a62@googlegroups.com> <077e7f6a-5a7b-4b88-a16f-7672aec18a17@googlegroups.com> User-Agent: G2/1.0 MIME-Version: 1.0 Message-ID: Subject: Re: Portable memory barrier? From: Robert Eachus Injection-Date: Thu, 11 May 2017 01:51:32 +0000 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Xref: news.eternal-september.org comp.lang.ada:46761 Date: 2017-05-10T18:51:31-07:00 List-Id: On Wednesday, May 10, 2017 at 9:02:22 PM UTC-4, Randy Brukardt wrote: > Write_Index needs to be atomic in order for the OP's algorithm to work.= =20 > Atomic objects fall under C.6(20/5) -- all reads and updates are included= in=20 > the external effect of the program. Optimizing them out (in any way) is= =20 > wrong (excepting of course a true as-if optimization, but that doesn't ma= ke=20 > any sense in this case). In particular, saving the value in a register is= =20 > useless, because you still have to read the object again at the next=20 > reference. Even if there is no intervening read or write of anything? It seems to me = that must be an "as if," since there is no way to prove otherwise. You may= be thinking of reads of memory external to the CPU, part of some other har= dware, where the other hardware can intervene. Ah, the missing attribute: Uncacheable. Once upon a time, volatile implie= d that, but not for many years. I guess there are still (embedded) process= ors out there where reading from a (memory mapped I/O) location changes its= value, so I guess that is an issue for Ada, but only when running on bare = metal. What about spin-locks? They have to have another action between reads to w= ork. Well you could pack all of a read, a test and say a jump non-zero all= in one clock cycle. But then there would be an extra read since the test = would be on the prior version of the flags. Put it into two clocks and the= CPU can't be sure that the next read will occur. In other words, it has t= o do the right number of reads which can affect flags, and no more. Hmm. You need to read the (x86 and most other) rules for prefetching memory= locations. As I stated earlier in this thread, any CPU core is allowed to= do a prefetch of any location, as long as it does not cause an action like= an interrupt. This is necessary, or you wouldn't be able to have any Atom= ic accesses. The CPU reads an entire cache line, usually 64, 128, or 256 by= tes into the cache, but even the widest of CPU writes are only 64 bytes wid= e, and those are multiple floating-point values.