From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,FREEMAIL_FROM autolearn=unavailable autolearn_force=no version=3.4.4 X-Received: by 10.99.94.71 with SMTP id s68mr44795039pgb.129.1481489711123; Sun, 11 Dec 2016 12:55:11 -0800 (PST) X-Received: by 10.157.18.211 with SMTP id g77mr5901123otg.14.1481489711055; Sun, 11 Dec 2016 12:55:11 -0800 (PST) Path: eternal-september.org!reader01.eternal-september.org!reader02.eternal-september.org!news.eternal-september.org!news.eternal-september.org!feeder.eternal-september.org!news.glorb.com!n6no5483448qtd.0!news-out.google.com!m27ni7623qtf.1!nntp.google.com!n6no5483446qtd.0!postnews.google.com!glegroupsg2000goo.googlegroups.com!not-for-mail Newsgroups: comp.lang.ada Date: Sun, 11 Dec 2016 12:55:10 -0800 (PST) Complaints-To: groups-abuse@google.com Injection-Info: glegroupsg2000goo.googlegroups.com; posting-host=67.0.242.189; posting-account=lJ3JNwoAAAAQfH3VV9vttJLkThaxtTfC NNTP-Posting-Host: 67.0.242.189 User-Agent: G2/1.0 MIME-Version: 1.0 Message-ID: Subject: Hardware Design supporting Ada From: Shark8 Injection-Date: Sun, 11 Dec 2016 20:55:11 +0000 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Xref: news.eternal-september.org comp.lang.ada:32730 Date: 2016-12-11T12:55:10-08:00 List-Id: In the Ada IR thread an interesting sub-discussion regarding specialized ha= rdware came up; some of the HW mentioned were: * The Rational R-1000 =E2=80=94=E2=80=94 https://en.wikipedia.org/wiki/Rational_R1000 =E2=80=94=E2=80=94 http://datamuseum.dk/wiki/Rational/R1000s400 =E2=80=94=E2=80=94 http://www.somethinkodd.com/oddthinking/category/geek/so= ftware-development/rat1000/ =E2=80=94=E2=80=94 http://repository.cmu.edu/cgi/viewcontent.cgi?article=3D= 1141&context=3Dsei * The Intel iAPX 432 =E2=80=94=E2=80=94 https://en.wikipedia.org/wiki/Intel_iAPX_432 =E2=80=94=E2=80=94 http://www.brouhaha.com/~eric/retrocomputing/intel/iapx4= 32/cs460/ =E2=80=94=E2=80=94 http://bitsavers.trailing-edge.com/pdf/intel/iAPX_432/17= 2283-001_Reference_Manual_for_the_Intel_432_Extensions_to_Ada_Dec81.pdf * The Rekursiv =E2=80=94=E2=80=94 https://en.wikipedia.org/wiki/Rekursiv =E2=80=94=E2=80=94 http://web.archive.org/web/20070607072521/http://www.erg= .abdn.ac.uk/research/projects/rekursiv.html =E2=80=94=E2=80=94 http://www.slideshare.net/sebrose/rekursiv In addition to this, I've been doing some work looking into balanced-ternar= y computers -- like this: http://practicaldev.herokuapp.com/buntine/the-bal= anced-ternary-machines-of-soviet-russia and this: http://citeseerx.ist.psu.= edu/viewdoc/download?doi=3D10.1.1.139.3198&rep=3Drep1&type=3Dpdf -- which i= ndicate that it is possible and implementable w/ current fabrication proces= ses. Further, [balanced] ternary provides some interesting properties; if, for e= xample, we define {1, 0, -1} as {greater-than, equal, less-than} respective= ly then we can have a JUMP instruction that takes this single Trit comparis= on result and three offsets and take care of ALL the JUMP combinations in b= inary instruction-sets with one instruction. Moreover, if we define ((x,x,x= ),(x,x,x),(x,x,x)) as a "Byte" then a single Byte may be used to describe a= ny binary operation. (e.g. Result =3D Byte_Value(A)(B).) Taking these properties into consideration we could reduce something like if A AND B then statements_1; elsif A XOR B then statements_2; else statements_3; end if; to a single compare and a single jump via the following byte/table ((-1,1,-= 1)(1,0,1)(-1,1,-1)) with the jump populated w/ offset-values appropriately = set. I may be able to get into some chip manufacturing (I have a few contacts, a= nd some family involved in the industry) -- there's also a university nearb= y which may be interested (HEAVY tech and math emphases; students needing s= enior-projects, professors possibly needing research topics, etc) and my pa= rticular State (in the US) is looking to stimulate its economy, so obtainin= g a grant is not out-of-the-question. However, this is all moot w/o having a clear vision WRT to what the end-pro= duct should be. What I have in mind now is a ternary computer with a co-pro= cessor of 9 'cores' where each core is a 3-stack stack-machine; this -- htt= p://fpgacpu.ca/stack/Second-Generation_Stack_Computer_Architecture.pdf -- i= llustrates a few stack-machines, one of which has a predicted sustained exe= cution rate of 2400 MIPS.... but I honestly have little idea of what I coul= d do in-hardware to support Ada, which I'd like to do. What's everyone on comp.lang.ada's suggestions, insights, and advice on the= topic?