From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,FREEMAIL_FROM autolearn=unavailable autolearn_force=no version=3.4.4 X-Received: by 10.107.197.66 with SMTP id v63mr10714413iof.77.1494037423715; Fri, 05 May 2017 19:23:43 -0700 (PDT) X-Received: by 10.157.40.242 with SMTP id s105mr1042198ota.5.1494037423669; Fri, 05 May 2017 19:23:43 -0700 (PDT) Path: eternal-september.org!reader01.eternal-september.org!reader02.eternal-september.org!news.eternal-september.org!news.eternal-september.org!feeder.eternal-september.org!news.glorb.com!c26no880804itd.0!news-out.google.com!x200ni3417itb.0!nntp.google.com!c26no880802itd.0!postnews.google.com!glegroupsg2000goo.googlegroups.com!not-for-mail Newsgroups: comp.lang.ada Date: Fri, 5 May 2017 19:23:43 -0700 (PDT) Complaints-To: groups-abuse@google.com Injection-Info: glegroupsg2000goo.googlegroups.com; posting-host=173.71.201.205; posting-account=QF6XPQoAAABce2NyPxxDAaKdAkN6RgAf NNTP-Posting-Host: 173.71.201.205 User-Agent: G2/1.0 MIME-Version: 1.0 Message-ID: Subject: Portable memory barrier? From: Jere Injection-Date: Sat, 06 May 2017 02:23:43 +0000 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Xref: news.eternal-september.org comp.lang.ada:46676 Date: 2017-05-05T19:23:43-07:00 List-Id: So I am implementing a circular buffer, which means I don't need to use a p= rotected object between the Consumer and Producer (assuming 1 each ... Cons= umer adjusts one index, Producer adjusts another), but I have run into one = area where CPU architecture could get me. In one procedure (Producer's Put procedure), I run into the situation where= I need to update the buffer, then the index (in that order) to ensure that= the consumer doesn't see the index change before the data is actually ther= e. >From a compiler optimization perspective, I believe I can tackle this with = the Volatile pragma/aspect. Assuming it works like it does in C, volatile = variables have to have their accesses in sequence. I think the RM also ref= lects this [0]? However, I know some CPUs can further reorder instructions. I know those s= pecific processors usually have something like a memory barrier to force on= e write before the other, but I wanted to avoid doing inline assembly. =20 Are there any Ada language constructs that can help? I don't mind using pr= otected objects, but I don't know if that guarantees me a memory barrier fo= r CPU's that support that (or whatever means an architecture supplies). I = don't, however, want to use a protected object between the Consumer and the= Producer so that one doesn't block out the other. If a language portable construct does not exist, does a GNAT one exist? I'= ve been searching around tonight but haven't run into anything yet in the A= da front. For GNAT I think Pragma Enable_Atomic_Synchronization [1] might = work (assuming I use the Atomic pragma on a correctly sized variable)? [0] (C.6 16/3) http://www.ada-auth.org/standards/12rm/html/RM-C-6.html [1] https://gcc.gnu.org/onlinedocs/gnat_rm/Pragma-Enable_005fAtomic_005fSyn= chronization.html