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NNTP-Posting-Date: Sat, 06 May 2017 14:10:59 -0500
From: Dennis Lee Bieber <wlfraed@ix.netcom.com>
Newsgroups: comp.lang.ada
Subject: Re: Portable memory barrier?
Date: Sat, 06 May 2017 15:08:39 -0400
Organization: IISS Elusive Unicorn
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Xref: news.eternal-september.org comp.lang.ada:46687
Date: 2017-05-06T15:08:39-04:00
List-Id: <comp.lang.ada>

On Sat, 6 May 2017 07:17:10 -0700 (PDT), Jere <jhb.chat@gmail.com>
declaimed the following:

>Is this not the case?

	My understanding of "volatile" is that it means: do not cache/optimize
(say, by assigning it to a register within the scope of the procedure);
instead, every source (read) usage must read the physical address, on the
basis that some other process (or hardware) may have changed the contents
behind your back.


	While a processor may reorder operations for efficiency, no
optimization (run-time or compiler) should reorder an update if the
subsequent operation needs to read the updated value.

	ipt := ipt + 1;
	arr(ipt) := something;
	rndvar := othervar;

could reorder the last line to anywhere in the sequence.
-- 
	Wulfraed                 Dennis Lee Bieber         AF6VN
    wlfraed@ix.netcom.com    HTTP://wlfraed.home.netcom.com/