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From: dewar@merv.cs.nyu.edu (Robert Dewar)
Subject: Re: Fast locking (Was Re: Java vs Ada 95)
Date: 1996/11/07
Message-ID: <dewar.847398083@merv>#1/1
X-Deja-AN: 195208489
references: <325BC3B3.41C6@hso.link.com>
 <EACHUS.96Nov1103759@spectre.mitre.org> <E07Dwq.5L@world.std.com>
 <55gkch$gg6@fozzie.sun3.iaf.nl> <E0B6CL.84r@world.std.com>
 <dewar.847053681@merv> <55o4g4$ki8@fozzie.sun3.iaf.nl>
 <1996Nov5.235745.1@eisner> <55r16k$m00@fozzie.sun3.iaf.nl>
 <1996Nov7.073254.1@eisner>
organization: New York University
newsgroups: comp.lang.ada
Date: 1996-11-07T00:00:00+00:00
List-Id: <comp.lang.ada>


Geert says

"> I can't imagine there are many systems around these days that do not
> provide efficient test-and-set semantics. Even the 8088 processor that
> does not directly have a test-and-set instruction can easily emulate
> one by doing an atomic swap between a processor register and a memory
> location. On very simple processors it is almost always possible to
> block all interrupts while doing the test-and-set."

Your imagination is deficient. Examples are the RS6000 and all earlier
MIPS chips. There are others!