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From: Ahlan Marriott <ahlan@marriott.org>
Subject: Using Log_Float in inline assembler for ARM
Date: Sun, 19 Nov 2023 04:22:20 -0800 (PST)	[thread overview]
Message-ID: <d682bfb7-d3cc-4652-9537-f64eeaa49424n@googlegroups.com> (raw)

Hi,
The following procedure Unbiased_Rounding for Float works as expected.

   function Unbiased_Rounding (X : Float) return Float is
      Y : Float;
   begin
      Asm ("vrintn.f32 %0,%1",
            Outputs  => Float'asm_output ("=t", Y),
            Inputs   => Float'asm_input ("t", X));
      return Y;
  end Unbiased_Rounding;

according to https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html
the constraint t means "VFP floating-point registers s0-s31. Used for 32 bit values” and the constraint w means "VFP floating-point registers d0-d31 and the appropriate subset d0-d15 based on command line options. Used for 64 bit values only”

therefore we wrote our long_float version as

  function Unbiased_Rounding (X : Long_Float) return Long_Float is
      Y : Long_Float;
   begin
      Asm ("vrintn.f64 %0,%1",
            Outputs  => Long_Float'asm_output ("=w", Y),
            Inputs   => Long_Float'asm_input ("w", X));
      return Y;
   end Unbiased_Rounding;

however this fails to compile.
GNAT 11.2/0-4 (Alire) complains
Error: invalid instruction shape -- `vrintn.f64 s14,s14’

presumably because the operands are S registers rather than double precisions D registers.
Is this a bug or have we misunderstood something?

Best wishes,
Ahlan

             reply	other threads:[~2023-11-19 12:22 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-19 12:22 Ahlan Marriott [this message]
2023-11-24  9:09 ` Using Log_Float in inline assembler for ARM Ahlan Marriott
2023-11-24 10:43   ` Jeffrey R.Carter
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