From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,LOTS_OF_MONEY autolearn=unavailable autolearn_force=no version=3.4.4 X-Received: by 2002:a24:640e:: with SMTP id t14-v6mr2498064itc.0.1530373828235; Sat, 30 Jun 2018 08:50:28 -0700 (PDT) X-Received: by 2002:aca:f495:: with SMTP id s143-v6mr158198oih.7.1530373828132; Sat, 30 Jun 2018 08:50:28 -0700 (PDT) Path: eternal-september.org!reader01.eternal-september.org!reader02.eternal-september.org!feeder.eternal-september.org!news.unit0.net!newsreader5.netcologne.de!news.netcologne.de!peer03.ams1!peer.ams1.xlned.com!news.xlned.com!peer03.am4!peer.am4.highwinds-media.com!peer01.iad!feed-me.highwinds-media.com!news.highwinds-media.com!d7-v6no1446852itj.0!news-out.google.com!z3-v6ni1120iti.0!nntp.google.com!u78-v6no1427458itb.0!postnews.google.com!glegroupsg2000goo.googlegroups.com!not-for-mail Newsgroups: comp.lang.ada Date: Sat, 30 Jun 2018 08:50:27 -0700 (PDT) Complaints-To: groups-abuse@google.com Injection-Info: glegroupsg2000goo.googlegroups.com; posting-host=47.185.195.62; posting-account=zwxLlwoAAAChLBU7oraRzNDnqQYkYbpo NNTP-Posting-Host: 47.185.195.62 User-Agent: G2/1.0 MIME-Version: 1.0 Message-ID: Subject: new DARPA initiative: optimizing compiler to logic-gates+PCB target From: "Dan'l Miller" Injection-Date: Sat, 30 Jun 2018 15:50:28 +0000 Content-Type: text/plain; charset="UTF-8" X-Received-Bytes: 2028 X-Received-Body-CRC: 3149751539 Xref: reader02.eternal-september.org comp.lang.ada:53479 Date: 2018-06-30T08:50:27-07:00 List-Id: https://www.eetimes.com/document.asp?doc_id=1333422#msgs What the Electronics Resurgence Initiative (ERI) describes seems to be somewhere in the vicinity of Ada*+VHDL**+SPICE***+ATP****. * e.g., for at least algorithmic description and data-structure/record-layout description, and perhaps general front-end/optimizing-backend architecture of bringing the concepts of a software compiler to ASIC/FPGA+PCB hardware ** e.g., for digital-logic description *** e.g., for analog-electronics modeling, especially on the PCB **** e.g., automated theorem prover, for automated transformation in lifter, lateral, and lowering directions $100 million bet is on the table at the DARPA casino. (Around AD2000 or so give or take a few years, Shlaer-Mellor world thought this was going to be their space to dominate. Their vacuum/void is someone else's to fill nowadays.)