From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00 autolearn=ham autolearn_force=no version=3.4.4 X-Google-Thread: 103376,b95a522100671708 X-Google-Attributes: gid103376,public X-Google-Language: ENGLISH,ASCII-7-bit Path: g2news1.google.com!news1.google.com!proxad.net!fr.ip.ndsoftware.net!border2.nntp.ams.giganews.com!border1.nntp.ams.giganews.com!nntp.giganews.com!newshub2.home.nl!newshub1.home.nl!home.nl!not-for-mail From: Ad Buijsen Newsgroups: comp.lang.ada Subject: Re: For the AdaOS folks Date: Mon, 03 Jan 2005 17:48:06 +0100 Organization: @Home Benelux Message-ID: References: <1PTAd.1218$0y4.421@read1.cgocable.net> <1vemlj8wqr9ea$.qyecszhsmtqa$.dlg@40tude.net> <1b48kdfqsk3mw.7gajq12fsa82.dlg@40tude.net> <52fBd.42256$nV.1324414@news20.bellglobal.com> <33li96F422q0fU1@individual.net> <33qh7eF42pn2fU1@individual.net> NNTP-Posting-Host: cp59361-a.roose1.nb.home.nl Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit X-Trace: news1.zwoll1.ov.home.nl 1104770893 24108 84.26.238.221 (3 Jan 2005 16:48:13 GMT) X-Complaints-To: usenet@corp.home.nl NNTP-Posting-Date: Mon, 3 Jan 2005 16:48:13 +0000 (UTC) User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.7.3) Gecko/20041007 Debian/1.7.3-5 X-Accept-Language: en In-Reply-To: Xref: g2news1.google.com comp.lang.ada:7410 Date: 2005-01-03T17:48:06+01:00 List-Id: Warren W. Gay VE3WWG wrote: > Luke A. Guest wrote: >> I certainly wouldn't do it like that. On hardware that has an MMU (most >> these days), that would result in a very slow system due to the amount of >> context switches, this is why the libraries need to be mapped into the >> address space of the running app, i.e. shared between applications. > > > There is no argument about the overhead in this case. However, I > maintain that if enough people start using operating systems > that are implemented this way, they'll finally enhance the > hardware to correct this problem. Until then, people may as well > continue to say "we can't do it that way". I believe the problem > is fixable in hardware. > It is, by tagging the TLB lines with an address space identifier. This is supported by MIPS CPUs with a R4000-style MMU (ASId), Alpha 21164 and 21264 (ASN; the 21264 also has a tagged instruction cache), PowerPC-BookE (TID) and probably some mainframe CPUs. Tagged TLBs can be simulated on IA32 and 'classic' PPC by segmentation tricks; this was done for L4. I suspect that the Athlon64 has hidden tags to implement the flush filters. The next problem would be the cost (in cycles) of kernel entry... Ad Buijsen