From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00 autolearn=unavailable autolearn_force=no version=3.4.4 X-Received: by 2002:a24:7a05:: with SMTP id a5-v6mr1718091itc.19.1529722499532; Fri, 22 Jun 2018 19:54:59 -0700 (PDT) X-Received: by 2002:aca:aa82:: with SMTP id t124-v6mr49242oie.1.1529722499453; Fri, 22 Jun 2018 19:54:59 -0700 (PDT) Path: eternal-september.org!reader01.eternal-september.org!reader02.eternal-september.org!feeder.eternal-september.org!border1.nntp.ams1.giganews.com!nntp.giganews.com!feeds.phibee-telecom.net!newsfeed.xs4all.nl!newsfeed7.news.xs4all.nl!85.12.16.70.MISMATCH!peer03.ams1!peer.ams1.xlned.com!news.xlned.com!peer03.am4!peer.am4.highwinds-media.com!peer02.iad!feed-me.highwinds-media.com!news.highwinds-media.com!u78-v6no1366181itb.0!news-out.google.com!z3-v6ni1452iti.0!nntp.google.com!u78-v6no1366177itb.0!postnews.google.com!glegroupsg2000goo.googlegroups.com!not-for-mail Newsgroups: comp.lang.ada Date: Fri, 22 Jun 2018 19:54:59 -0700 (PDT) In-Reply-To: <300422673.551411179.249790.laguest-archeia.com@nntp.aioe.org> Complaints-To: groups-abuse@google.com Injection-Info: glegroupsg2000goo.googlegroups.com; posting-host=47.185.195.62; posting-account=zwxLlwoAAAChLBU7oraRzNDnqQYkYbpo NNTP-Posting-Host: 47.185.195.62 References: <584564c2-9f64-4965-b045-535cdaf899c0@googlegroups.com> <7cb22c58-3009-47f0-8fe7-62f3cd61785d@googlegroups.com> <52b14af1-ee0a-40af-871a-beeced6bce1c@googlegroups.com> <87wour97a8.fsf@nightsong.com> <98aac007-7512-4ae3-94de-f02e7e2651ae@googlegroups.com> <87k1qr8oyz.fsf@nightsong.com> <8e8e7ce9-d7ac-4ec5-8278-7b93cec46599@googlegroups.com> <145294063.551401932.678101.laguest-archeia.com@nntp.aioe.org> <300422673.551411179.249790.laguest-archeia.com@nntp.aioe.org> User-Agent: G2/1.0 MIME-Version: 1.0 Message-ID: Subject: Re: Why are Ada compilers difficult to write ? From: "Dan'l Miller" Injection-Date: Sat, 23 Jun 2018 02:54:59 +0000 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Received-Bytes: 3454 X-Received-Body-CRC: 3948543884 Xref: reader02.eternal-september.org comp.lang.ada:53265 Date: 2018-06-22T19:54:59-07:00 List-Id: On Friday, June 22, 2018 at 8:49:37 PM UTC-5, Luke A. Guest wrote: > Dan'l Miller wrote: >=20 > >> The ports are in various states of broken-ness as well. None are up to > >> date, all are partially done. Believe me I=E2=80=99ve looked. > >=20 > > I can understand phasing Alpha and VAX and National Semiconductor 32032 > > ISAs out of modern GCC because each is no longer manufactured, but I > > think that every compiler should support every processor on the planet > > that is manufactured =E2=80=A2today=E2=80=A2. > >=20 >=20 > But Z80 was never officially ported to GCC, there have been attempts whic= h > seemed to die because of the severe lack of registers, iirc. Also Z80 > doesn=E2=80=99t have zero page tricks like the 6502. Yes, but the Z80 has the 8080's three 16-bit registers BC, DE, and HL by co= ncatenating 8-bit register pairs, but the Z80 has three more shadow 16-bit = registers BC', DE', and HL' that can be swapped in and out. (Plus AF and A= F' if you like living dangerously with the flag registers.) 6502 needed th= e page-zero trick because its register-set was so spartan. (Only TI's TMS9= 900 had an even more spartan register-set in that era.) > I=E2=80=99ve read that the current LRA (I think it=E2=80=99s called) regi= ster scheduler > would be better for these kinds of CPU=E2=80=99s. It would appear so. What came before LRA looks like big-ball-of-mud archit= ecture whose concrete set hard & brittle long long ago.