Re: Support of Task Interrupt Entries

[eachus@spectre.mitre.org (Robert I. Eachus)]

In article <1998Oct7.183511.17020@nosc.mil> csampson@inetworld.net (Charles H. Sampson) writes:

 >     According to LRM 1.1.2(6), Annex J is part of the core language 
 >  and must therefore be supported by any standard-conforming compiler.  
 > However, in J.7.1(1) we have, "Implementations are _permitted_ to allow 
 > the attachment of task entries to interrupts via the address clause."  
 > Does this mean that they are also permitted to disallow this?

   The next paragraph should make it clear:

   "The address of the task entry corresponds to a hardware interrupt
in an implementation-defined manner."

   The standard can't reasonably define a set of addresses and
interrupts to support, so that is left to the implementors, who can
choose none.  Of course, the rules of J.7.1 do apply to any interrupt
entries that are supported.

 >     This is an important point to my current project, a real time sys-
 > tem with a very large number of interrupt handlers that is porting from 
 > Ada 83 to Ada 95.  The validated Ada compiler that we have selected does 
 > not support J.7.1.

   Do they support the SP Annex? If they don't support the Systems
Programming annex, it seems to me you need to choose another compiler.
If they do claim to support the SP annex then you can use
Ada.Interrupts.Reference to bind interrupts to task entries.  (See C.3.2(22))
--

					Robert I. Eachus

with Standard_Disclaimer;
use  Standard_Disclaimer;
function Message (Text: in Clever_Ideas) return Better_Ideas is...