From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00 autolearn=unavailable autolearn_force=no version=3.4.4 X-Received: by 2002:a24:94ce:: with SMTP id j197-v6mr127211ite.37.1525980290715; Thu, 10 May 2018 12:24:50 -0700 (PDT) X-Received: by 2002:a9d:703:: with SMTP id 3-v6mr124120ote.11.1525980290567; Thu, 10 May 2018 12:24:50 -0700 (PDT) Path: eternal-september.org!reader01.eternal-september.org!reader02.eternal-september.org!feeder.eternal-september.org!paganini.bofh.team!weretis.net!feeder6.news.weretis.net!feeder.usenetexpress.com!feeder-in1.iad1.usenetexpress.com!border1.nntp.dca1.giganews.com!nntp.giganews.com!v8-v6no633035itc.0!news-out.google.com!f20-v6ni729itd.0!nntp.google.com!u74-v6no639946itb.0!postnews.google.com!glegroupsg2000goo.googlegroups.com!not-for-mail Newsgroups: comp.lang.ada Date: Thu, 10 May 2018 12:24:50 -0700 (PDT) In-Reply-To: Complaints-To: groups-abuse@google.com Injection-Info: glegroupsg2000goo.googlegroups.com; posting-host=47.185.233.194; posting-account=zwxLlwoAAAChLBU7oraRzNDnqQYkYbpo NNTP-Posting-Host: 47.185.233.194 References: User-Agent: G2/1.0 MIME-Version: 1.0 Message-ID: <9af47760-e731-4cb5-a1a0-d63e31019ce5@googlegroups.com> Subject: Re: AI12-0218: What is the portable representation clause for processing IETF packets on little-endian machines? From: "Dan'l Miller" Injection-Date: Thu, 10 May 2018 19:24:50 +0000 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Xref: reader02.eternal-september.org comp.lang.ada:52203 Date: 2018-05-10T12:24:50-07:00 List-Id: On Thursday, May 10, 2018 at 12:45:43 PM UTC-5, Dan'l Miller wrote: > =E2=80=A6 byte-swapping is what makes the Internet work on the computer t= hat you are using right this instant > (unless you are using a PowerPC-, POWER-, 68K-, MIPS-, or mainframe-based= computer or an Alpha- or > Itanium-based computer configured in the rare big-endian configuration). Oops. In that list, I forgot SPARC there for another 0.01%* of the compute= rs on planet Earth. * I am completely uncertain whether that is hyperbole or fact. I pulled th= at number out of thin air, but it sounds about right. And just in case anyone is thinking, =E2=80=9COh, every single one of the n= ew designs of ISAs have been big-endian for decades; all those little-endia= n ISAs are all for antiquated legacy reasons: ARM derived from little-endi= an 6502; Alpha derived from little-endian VAX; Intel derived from Fairchild= =E2=80=9D, the newest (open-source!) hot-shot kid on the block in the ISA n= eighborhood is =E2=80=A2little-endian=E2=80=A2: RISC-V. https://en.wikipedia.org/wiki/RISC-V RISC-V looks promising too, likely to give PowerPC, MIPS, SPARC, and ARM a = run for their money. Here is Esperanto's debut RISC-V product, which as a = leap forward has practically no direct competitor in any other ISA: https://fuse.wikichip.org/news/686/esperanto-exits-stealth-mode-aims-at-ai-= with-a-4096-core-7nm-risc-v-monster