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From: wildstar@nmtvax.UUCP
Newsgroups: net.arch,net.lang.ada
Subject: Re: systolic processor?
Message-ID: <815@nmtvax.UUCP>
Date: Wed, 16-Oct-85 01:46:32 EDT
Article-I.D.: nmtvax.815
Posted: Wed Oct 16 01:46:32 1985
Date-Received: Fri, 18-Oct-85 01:28:35 EDT
References: <796@kuling.UUCP> <2580002@csd2.UUCP>
Reply-To: wildstar@nmtvax.UUCP (Andrew Fine)
Organization: New Mexico Tech, Socorro
Xref: watmath net.arch:1917 net.lang.ada:414
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     I had an idea about creating a systolic machine, but it might not seem to
follow any orthodox rules.  I would like to build a PROLOG machine capable of
spawning off processes in parallel instead of performing backtracking.

The way I thought of doing it is as follows:

1) For each cell, let the cell have a 32 bit mpu with a large amount of local
memory (1M dynamic) and just enough ROM on board to recognize a PROLOG kernal.

2) The interconnection medium would be a one dimensional microwave waveguide
having an overall bandwidth of, say 100 Ghz to use a nice round number. This
medium would be divided into channels of 1 Mhz , for a total of 100,000
channels.

3) Each cell would have 2 adjustable listening center frequencies and 1
adjustable transmitting center frequency.  The adjustments would be controlled
by each cell under it's own individual software control.

4) Cells would communicate with each other under a distributed contention
protocol. Ideally, groups of cells would be clustered together under mutual
communication in a process, such that the contention protocol would do
the equivalent of segmentation.

Does this sound like it makes any sense?

Andrew Fine